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431 | jermar | 1 | /* |
2071 | jermar | 2 | * Copyright (c) 2005 Jakub Jermar |
431 | jermar | 3 | * All rights reserved. |
4 | * |
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5 | * Redistribution and use in source and binary forms, with or without |
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6 | * modification, are permitted provided that the following conditions |
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7 | * are met: |
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8 | * |
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9 | * - Redistributions of source code must retain the above copyright |
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10 | * notice, this list of conditions and the following disclaimer. |
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11 | * - Redistributions in binary form must reproduce the above copyright |
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12 | * notice, this list of conditions and the following disclaimer in the |
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13 | * documentation and/or other materials provided with the distribution. |
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14 | * - The name of the author may not be used to endorse or promote products |
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15 | * derived from this software without specific prior written permission. |
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16 | * |
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17 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
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18 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
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19 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
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20 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
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21 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
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22 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
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23 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
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24 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
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25 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
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26 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
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27 | */ |
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28 | |||
1888 | jermar | 29 | /** @addtogroup ia64interrupt |
1702 | cejka | 30 | * @{ |
31 | */ |
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32 | /** @file |
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33 | */ |
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34 | |||
1888 | jermar | 35 | #ifndef KERN_ia64_INTERRUPT_H_ |
36 | #define KERN_ia64_INTERRUPT_H_ |
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431 | jermar | 37 | |
470 | jermar | 38 | #include <arch/types.h> |
472 | jermar | 39 | #include <arch/register.h> |
470 | jermar | 40 | |
1942 | jermar | 41 | /** ia64 has 256 INRs. */ |
42 | #define INR_COUNT 256 |
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1265 | jermar | 43 | |
1942 | jermar | 44 | /* |
45 | * We need to keep this just to compile. |
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46 | * We might eventually move interrupt/ stuff |
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47 | * to genarch. |
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48 | */ |
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49 | #define IVT_ITEMS 0 |
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50 | #define IVT_FIRST 0 |
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51 | |||
472 | jermar | 52 | /** External Interrupt vectors. */ |
3626 | vana | 53 | |
54 | #define VECTOR_TLB_SHOOTDOWN_IPI 0xf0 |
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2064 | vana | 55 | #define INTERRUPT_TIMER 255 |
3661 | vana | 56 | #define IRQ_KBD (0x01+LAGACY_INTERRUPT_BASE) |
57 | #define IRQ_MOUSE (0x0c+LAGACY_INTERRUPT_BASE) |
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433 | jermar | 58 | #define INTERRUPT_SPURIOUS 15 |
3657 | vana | 59 | #define LAGACY_INTERRUPT_BASE 0x20 |
433 | jermar | 60 | |
472 | jermar | 61 | /** General Exception codes. */ |
62 | #define GE_ILLEGALOP 0 |
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63 | #define GE_PRIVOP 1 |
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64 | #define GE_PRIVREG 2 |
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65 | #define GE_RESREGFLD 3 |
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66 | #define GE_DISBLDISTRAN 4 |
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67 | #define GE_ILLEGALDEP 8 |
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68 | |||
435 | jermar | 69 | #define EOI 0 /**< The actual value doesn't matter. */ |
70 | |||
2089 | decky | 71 | typedef struct { |
72 | uint128_t f2; |
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73 | uint128_t f3; |
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74 | uint128_t f4; |
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75 | uint128_t f5; |
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76 | uint128_t f6; |
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77 | uint128_t f7; |
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78 | uint128_t f8; |
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79 | uint128_t f9; |
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80 | uint128_t f10; |
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81 | uint128_t f11; |
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82 | uint128_t f12; |
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83 | uint128_t f13; |
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84 | uint128_t f14; |
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85 | uint128_t f15; |
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86 | uint128_t f16; |
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87 | uint128_t f17; |
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88 | uint128_t f18; |
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89 | uint128_t f19; |
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90 | uint128_t f20; |
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91 | uint128_t f21; |
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92 | uint128_t f22; |
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93 | uint128_t f23; |
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94 | uint128_t f24; |
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95 | uint128_t f25; |
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96 | uint128_t f26; |
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97 | uint128_t f27; |
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98 | uint128_t f28; |
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99 | uint128_t f29; |
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100 | uint128_t f30; |
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101 | uint128_t f31; |
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1265 | jermar | 102 | |
1780 | jermar | 103 | uintptr_t ar_bsp; |
104 | uintptr_t ar_bspstore; |
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105 | uintptr_t ar_bspstore_new; |
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106 | uint64_t ar_rnat; |
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107 | uint64_t ar_ifs; |
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108 | uint64_t ar_pfs; |
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109 | uint64_t ar_rsc; |
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110 | uintptr_t cr_ifa; |
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472 | jermar | 111 | cr_isr_t cr_isr; |
1780 | jermar | 112 | uintptr_t cr_iipa; |
921 | jermar | 113 | psr_t cr_ipsr; |
1780 | jermar | 114 | uintptr_t cr_iip; |
115 | uint64_t pr; |
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116 | uintptr_t sp; |
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921 | jermar | 117 | |
118 | /* |
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2608 | jermar | 119 | * The following variables are defined only for break_instruction |
120 | * handler. |
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921 | jermar | 121 | */ |
1780 | jermar | 122 | uint64_t in0; |
123 | uint64_t in1; |
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124 | uint64_t in2; |
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125 | uint64_t in3; |
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126 | uint64_t in4; |
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2608 | jermar | 127 | uint64_t in5; |
128 | uint64_t in6; |
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2089 | decky | 129 | } istate_t; |
431 | jermar | 130 | |
1780 | jermar | 131 | static inline void istate_set_retaddr(istate_t *istate, uintptr_t retaddr) |
1288 | jermar | 132 | { |
1295 | jermar | 133 | istate->cr_iip = retaddr; |
134 | istate->cr_ipsr.ri = 0; /* return to instruction slot #0 */ |
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1288 | jermar | 135 | } |
136 | |||
1780 | jermar | 137 | static inline unative_t istate_get_pc(istate_t *istate) |
1595 | palkovsky | 138 | { |
139 | return istate->cr_iip; |
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140 | } |
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1888 | jermar | 141 | |
1595 | palkovsky | 142 | static inline int istate_from_uspace(istate_t *istate) |
143 | { |
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1942 | jermar | 144 | return (istate->cr_iip) < 0xe000000000000000ULL; |
1595 | palkovsky | 145 | } |
146 | |||
470 | jermar | 147 | extern void *ivt; |
148 | |||
1780 | jermar | 149 | extern void general_exception(uint64_t vector, istate_t *istate); |
150 | extern int break_instruction(uint64_t vector, istate_t *istate); |
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151 | extern void universal_handler(uint64_t vector, istate_t *istate); |
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152 | extern void nop_handler(uint64_t vector, istate_t *istate); |
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153 | extern void external_interrupt(uint64_t vector, istate_t *istate); |
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154 | extern void disabled_fp_register(uint64_t vector, istate_t *istate); |
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470 | jermar | 155 | |
3657 | vana | 156 | |
431 | jermar | 157 | #endif |
1702 | cejka | 158 | |
1888 | jermar | 159 | /** @} |
1702 | cejka | 160 | */ |