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Rev | Author | Line No. | Line |
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112 | jermar | 1 | /* |
2071 | jermar | 2 | * Copyright (c) 2005 Jakub Jermar |
112 | jermar | 3 | * All rights reserved. |
4 | * |
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5 | * Redistribution and use in source and binary forms, with or without |
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6 | * modification, are permitted provided that the following conditions |
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7 | * are met: |
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8 | * |
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9 | * - Redistributions of source code must retain the above copyright |
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10 | * notice, this list of conditions and the following disclaimer. |
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11 | * - Redistributions in binary form must reproduce the above copyright |
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12 | * notice, this list of conditions and the following disclaimer in the |
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13 | * documentation and/or other materials provided with the distribution. |
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14 | * - The name of the author may not be used to endorse or promote products |
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15 | * derived from this software without specific prior written permission. |
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16 | * |
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17 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
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18 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
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19 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
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20 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
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21 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
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22 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
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23 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
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24 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
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25 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
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26 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
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27 | */ |
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28 | |||
1888 | jermar | 29 | /** @addtogroup ia64 |
1702 | cejka | 30 | * @{ |
31 | */ |
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32 | /** @file |
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33 | */ |
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34 | |||
1888 | jermar | 35 | #ifndef KERN_ia64_ATOMIC_H_ |
36 | #define KERN_ia64_ATOMIC_H_ |
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112 | jermar | 37 | |
627 | jermar | 38 | /** Atomic addition. |
39 | * |
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3774 | jermar | 40 | * @param val Atomic value. |
41 | * @param imm Value to add. |
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627 | jermar | 42 | * |
3774 | jermar | 43 | * @return Value before addition. |
627 | jermar | 44 | */ |
1104 | jermar | 45 | static inline long atomic_add(atomic_t *val, int imm) |
475 | jermar | 46 | { |
1104 | jermar | 47 | long v; |
475 | jermar | 48 | |
3774 | jermar | 49 | asm volatile ("fetchadd8.rel %0 = %1, %2\n" : "=r" (v), |
50 | "+m" (val->count) : "i" (imm)); |
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477 | vana | 51 | |
475 | jermar | 52 | return v; |
112 | jermar | 53 | } |
54 | |||
4664 | jermar | 55 | static inline uint64_t test_and_set(atomic_t *val) |
56 | { |
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3578 | vana | 57 | uint64_t v; |
58 | |||
59 | asm volatile ( |
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4664 | jermar | 60 | "movl %0 = 0x1;;\n" |
3774 | jermar | 61 | "xchg8 %0 = %1, %0;;\n" |
62 | : "=r" (v), "+m" (val->count) |
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3578 | vana | 63 | ); |
64 | |||
65 | return v; |
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66 | } |
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67 | |||
4664 | jermar | 68 | static inline void atomic_lock_arch(atomic_t *val) |
69 | { |
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70 | do { |
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71 | while (val->count) |
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72 | ; |
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73 | } while (test_and_set(val)); |
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74 | } |
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3578 | vana | 75 | |
3774 | jermar | 76 | static inline void atomic_inc(atomic_t *val) |
77 | { |
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78 | atomic_add(val, 1); |
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79 | } |
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475 | jermar | 80 | |
3774 | jermar | 81 | static inline void atomic_dec(atomic_t *val) |
82 | { |
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83 | atomic_add(val, -1); |
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84 | } |
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477 | vana | 85 | |
3774 | jermar | 86 | static inline long atomic_preinc(atomic_t *val) |
87 | { |
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88 | return atomic_add(val, 1) + 1; |
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89 | } |
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477 | vana | 90 | |
3774 | jermar | 91 | static inline long atomic_predec(atomic_t *val) |
92 | { |
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93 | return atomic_add(val, -1) - 1; |
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94 | } |
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95 | |||
96 | static inline long atomic_postinc(atomic_t *val) |
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97 | { |
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98 | return atomic_add(val, 1); |
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99 | } |
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100 | |||
101 | static inline long atomic_postdec(atomic_t *val) |
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102 | { |
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103 | return atomic_add(val, -1); |
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104 | } |
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105 | |||
112 | jermar | 106 | #endif |
1702 | cejka | 107 | |
1888 | jermar | 108 | /** @} |
1702 | cejka | 109 | */ |