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| Rev | Author | Line No. | Line |
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| 1 | jermar | 1 | /* |
| 2071 | jermar | 2 | * Copyright (c) 2001-2004 Jakub Jermar |
| 1 | jermar | 3 | * All rights reserved. |
| 4 | * |
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| 5 | * Redistribution and use in source and binary forms, with or without |
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| 6 | * modification, are permitted provided that the following conditions |
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| 7 | * are met: |
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| 8 | * |
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| 9 | * - Redistributions of source code must retain the above copyright |
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| 10 | * notice, this list of conditions and the following disclaimer. |
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| 11 | * - Redistributions in binary form must reproduce the above copyright |
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| 12 | * notice, this list of conditions and the following disclaimer in the |
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| 13 | * documentation and/or other materials provided with the distribution. |
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| 14 | * - The name of the author may not be used to endorse or promote products |
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| 15 | * derived from this software without specific prior written permission. |
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| 16 | * |
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| 17 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
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| 18 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
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| 19 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
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| 20 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
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| 21 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
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| 22 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
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| 23 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
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| 24 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
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| 25 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
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| 26 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
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| 27 | */ |
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| 28 | |||
| 1754 | jermar | 29 | /** @addtogroup ia32 |
| 1702 | cejka | 30 | * @{ |
| 31 | */ |
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| 1754 | jermar | 32 | /** |
| 33 | * @file |
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| 34 | * @brief i8254 chip driver. |
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| 35 | * |
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| 36 | * Low level time functions. |
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| 1702 | cejka | 37 | */ |
| 38 | |||
| 1 | jermar | 39 | #include <arch/types.h> |
| 40 | #include <time/clock.h> |
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| 41 | #include <time/delay.h> |
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| 2018 | decky | 42 | #include <arch/cycle.h> |
| 1 | jermar | 43 | #include <arch/interrupt.h> |
| 1477 | decky | 44 | #include <arch/drivers/i8259.h> |
| 45 | #include <arch/drivers/i8254.h> |
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| 1 | jermar | 46 | #include <cpu.h> |
| 47 | #include <config.h> |
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| 48 | #include <arch/pm.h> |
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| 49 | #include <arch/asm.h> |
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| 195 | vana | 50 | #include <arch/cpuid.h> |
| 1 | jermar | 51 | #include <arch.h> |
| 195 | vana | 52 | #include <time/delay.h> |
| 1956 | decky | 53 | #include <ddi/irq.h> |
| 54 | #include <ddi/device.h> |
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| 1 | jermar | 55 | |
| 56 | #define CLK_PORT1 0x40 |
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| 57 | #define CLK_PORT4 0x43 |
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| 58 | |||
| 59 | #define CLK_CONST 1193180 |
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| 60 | #define MAGIC_NUMBER 1194 |
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| 61 | |||
| 1956 | decky | 62 | static irq_t i8254_irq; |
| 576 | palkovsky | 63 | |
| 1956 | decky | 64 | static irq_ownership_t i8254_claim(void) |
| 65 | { |
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| 66 | return IRQ_ACCEPT; |
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| 67 | } |
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| 68 | |||
| 69 | static void i8254_irq_handler(irq_t *irq, void *arg, ...) |
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| 70 | { |
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| 71 | clock(); |
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| 72 | } |
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| 73 | |||
| 1 | jermar | 74 | void i8254_init(void) |
| 75 | { |
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| 1956 | decky | 76 | irq_initialize(&i8254_irq); |
| 77 | i8254_irq.devno = device_assign_devno(); |
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| 78 | i8254_irq.inr = IRQ_CLK; |
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| 79 | i8254_irq.claim = i8254_claim; |
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| 80 | i8254_irq.handler = i8254_irq_handler; |
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| 81 | irq_register(&i8254_irq); |
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| 82 | |||
| 1 | jermar | 83 | i8254_normal_operation(); |
| 84 | } |
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| 85 | |||
| 86 | void i8254_normal_operation(void) |
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| 87 | { |
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| 88 | outb(CLK_PORT4, 0x36); |
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| 1956 | decky | 89 | pic_disable_irqs(1 << IRQ_CLK); |
| 90 | outb(CLK_PORT1, (CLK_CONST / HZ) & 0xf); |
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| 91 | outb(CLK_PORT1, (CLK_CONST / HZ) >> 8); |
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| 92 | pic_enable_irqs(1 << IRQ_CLK); |
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| 1 | jermar | 93 | } |
| 94 | |||
| 95 | #define LOOPS 150000 |
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| 96 | #define SHIFT 11 |
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| 97 | void i8254_calibrate_delay_loop(void) |
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| 98 | { |
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| 1780 | jermar | 99 | uint64_t clk1, clk2; |
| 100 | uint32_t t1, t2, o1, o2; |
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| 101 | uint8_t not_ok; |
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| 1 | jermar | 102 | |
| 103 | |||
| 104 | /* |
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| 105 | * One-shot timer. Count-down from 0xffff at 1193180Hz |
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| 106 | * MAGIC_NUMBER is the magic value for 1ms. |
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| 107 | */ |
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| 108 | outb(CLK_PORT4, 0x30); |
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| 109 | outb(CLK_PORT1, 0xff); |
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| 110 | outb(CLK_PORT1, 0xff); |
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| 111 | |||
| 112 | do { |
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| 125 | jermar | 113 | /* will read both status and count */ |
| 1 | jermar | 114 | outb(CLK_PORT4, 0xc2); |
| 115 | not_ok = (inb(CLK_PORT1)>>6)&1; |
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| 116 | t1 = inb(CLK_PORT1); |
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| 117 | t1 |= inb(CLK_PORT1) << 8; |
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| 118 | } while (not_ok); |
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| 119 | |||
| 120 | asm_delay_loop(LOOPS); |
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| 121 | |||
| 122 | outb(CLK_PORT4, 0xd2); |
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| 123 | t2 = inb(CLK_PORT1); |
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| 124 | t2 |= inb(CLK_PORT1) << 8; |
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| 125 | |||
| 126 | /* |
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| 127 | * We want to determine the overhead of the calibrating mechanism. |
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| 128 | */ |
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| 129 | outb(CLK_PORT4, 0xd2); |
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| 130 | o1 = inb(CLK_PORT1); |
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| 131 | o1 |= inb(CLK_PORT1) << 8; |
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| 132 | |||
| 133 | asm_fake_loop(LOOPS); |
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| 134 | |||
| 135 | outb(CLK_PORT4, 0xd2); |
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| 136 | o2 = inb(CLK_PORT1); |
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| 137 | o2 |= inb(CLK_PORT1) << 8; |
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| 138 | |||
| 125 | jermar | 139 | CPU->delay_loop_const = ((MAGIC_NUMBER*LOOPS)/1000) / ((t1-t2)-(o1-o2)) + (((MAGIC_NUMBER*LOOPS)/1000) % ((t1-t2)-(o1-o2)) ? 1 : 0); |
| 1 | jermar | 140 | |
| 2018 | decky | 141 | clk1 = get_cycle(); |
| 142 | delay(1 << SHIFT); |
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| 143 | clk2 = get_cycle(); |
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| 1 | jermar | 144 | |
| 2018 | decky | 145 | CPU->frequency_mhz = (clk2 - clk1) >> SHIFT; |
| 1 | jermar | 146 | |
| 147 | return; |
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| 148 | } |
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| 149 | |||
| 1754 | jermar | 150 | /** @} |
| 1702 | cejka | 151 | */ |