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153 jermar 1 
/*
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 * Copyright (c) 2005 Jakub Jermar
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 * All rights reserved.
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 *
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 * Redistribution and use in source and binary forms, with or without
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 * modification, are permitted provided that the following conditions
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 * are met:
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 *
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 * - Redistributions of source code must retain the above copyright
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 *   notice, this list of conditions and the following disclaimer.
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 * - Redistributions in binary form must reproduce the above copyright
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 *   notice, this list of conditions and the following disclaimer in the
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 *   documentation and/or other materials provided with the distribution.
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 * - The name of the author may not be used to endorse or promote products
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 *   derived from this software without specific prior written permission.
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 *
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 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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 */
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/** @addtogroup ia32
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 * @{
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 */
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/** @file
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 */
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#ifndef KERN_ia32_BARRIER_H_
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#define KERN_ia32_BARRIER_H_
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/*
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 * NOTE:
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 * No barriers for critical section (i.e. spinlock) on IA-32 are needed:
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 * - spinlock_lock() and spinlock_trylock() use serializing XCHG instruction
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 * - writes cannot pass reads on IA-32 => spinlock_unlock() needs no barriers
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 */
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/*
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 * Provisions are made to prevent compiler from reordering instructions itself.
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 */
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#define CS_ENTER_BARRIER()	__asm__ volatile ("" ::: "memory")
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#define CS_LEAVE_BARRIER()	__asm__ volatile ("" ::: "memory")
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static inline void cpuid_serialization(void)
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{
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	__asm__ volatile (
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		"xorl %%eax, %%eax\n"
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		"cpuid\n"
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		::: "eax", "ebx", "ecx", "edx", "memory"
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	);
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}
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#ifdef CONFIG_FENCES_P4
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#	define memory_barrier()		__asm__ volatile ("mfence\n" ::: "memory")
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#	define read_barrier()		__asm__ volatile ("lfence\n" ::: "memory")
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#	ifdef CONFIG_WEAK_MEMORY
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#		define write_barrier()	__asm__ volatile ("sfence\n" ::: "memory")
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#	else
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#		define write_barrier()  __asm__ volatile( "" ::: "memory");
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#	endif
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#elif CONFIG_FENCES_P3
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#	define memory_barrier()		cpuid_serialization()
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#	define read_barrier()		cpuid_serialization()
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#	ifdef CONFIG_WEAK_MEMORY
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#		define write_barrier()	__asm__ volatile ("sfence\n" ::: "memory")
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#	else
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#		define write_barrier()  __asm__ volatile( "" ::: "memory");
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#	endif
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#else
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#	define memory_barrier()		cpuid_serialization()
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#	define read_barrier()		cpuid_serialization()
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#	ifdef CONFIG_WEAK_MEMORY
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#		define write_barrier()	cpuid_serialization()
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#	else
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#		define write_barrier()  __asm__ volatile( "" ::: "memory");
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#	endif
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#endif
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#endif
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/** @}
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 */