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570 | jermar | 1 | /* |
2 | * Copyright (C) 2005 Jakub Jermar |
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3 | * All rights reserved. |
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4 | * |
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5 | * Redistribution and use in source and binary forms, with or without |
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6 | * modification, are permitted provided that the following conditions |
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7 | * are met: |
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8 | * |
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9 | * - Redistributions of source code must retain the above copyright |
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10 | * notice, this list of conditions and the following disclaimer. |
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11 | * - Redistributions in binary form must reproduce the above copyright |
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12 | * notice, this list of conditions and the following disclaimer in the |
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13 | * documentation and/or other materials provided with the distribution. |
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14 | * - The name of the author may not be used to endorse or promote products |
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15 | * derived from this software without specific prior written permission. |
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16 | * |
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17 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
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18 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
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19 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
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20 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
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21 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
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22 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
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23 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
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24 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
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25 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
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26 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
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27 | */ |
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28 | |||
29 | #include <arch/mm/tlb.h> |
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30 | #include <mm/tlb.h> |
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619 | jermar | 31 | #include <arch/mm/frame.h> |
32 | #include <arch/mm/page.h> |
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33 | #include <arch/mm/mmu.h> |
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877 | jermar | 34 | #include <mm/asid.h> |
570 | jermar | 35 | #include <print.h> |
617 | jermar | 36 | #include <arch/types.h> |
37 | #include <typedefs.h> |
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619 | jermar | 38 | #include <config.h> |
630 | jermar | 39 | #include <arch/trap/trap.h> |
863 | jermar | 40 | #include <panic.h> |
873 | jermar | 41 | #include <arch/asm.h> |
42 | #include <symtab.h> |
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894 | jermar | 43 | |
883 | jermar | 44 | #include <arch/drivers/fb.h> |
895 | jermar | 45 | #include <arch/drivers/i8042.h> |
570 | jermar | 46 | |
873 | jermar | 47 | char *context_encoding[] = { |
48 | "Primary", |
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49 | "Secondary", |
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50 | "Nucleus", |
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51 | "Reserved" |
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52 | }; |
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53 | |||
619 | jermar | 54 | /** Initialize ITLB and DTLB. |
55 | * |
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56 | * The goal of this function is to disable MMU |
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57 | * so that both TLBs can be purged and new |
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58 | * kernel 4M locked entry can be installed. |
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59 | * After TLB is initialized, MMU is enabled |
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60 | * again. |
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627 | jermar | 61 | * |
62 | * Switching MMU off imposes the requirement for |
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63 | * the kernel to run in identity mapped environment. |
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619 | jermar | 64 | */ |
570 | jermar | 65 | void tlb_arch_init(void) |
66 | { |
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619 | jermar | 67 | tlb_tag_access_reg_t tag; |
68 | tlb_data_t data; |
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69 | frame_address_t fr; |
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70 | page_address_t pg; |
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71 | |||
72 | fr.address = config.base; |
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73 | pg.address = config.base; |
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646 | jermar | 74 | |
619 | jermar | 75 | immu_disable(); |
76 | dmmu_disable(); |
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898 | jermar | 77 | |
78 | /* |
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79 | * Demap everything, especially OpenFirmware. |
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80 | */ |
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81 | itlb_demap(TLB_DEMAP_CONTEXT, TLB_DEMAP_NUCLEUS, 0); |
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82 | dtlb_demap(TLB_DEMAP_CONTEXT, TLB_DEMAP_NUCLEUS, 0); |
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619 | jermar | 83 | |
84 | /* |
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846 | jermar | 85 | * We do identity mapping of 4M-page at 4M. |
619 | jermar | 86 | */ |
877 | jermar | 87 | tag.value = ASID_KERNEL; |
619 | jermar | 88 | tag.vpn = pg.vpn; |
89 | |||
90 | itlb_tag_access_write(tag.value); |
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91 | dtlb_tag_access_write(tag.value); |
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92 | |||
93 | data.value = 0; |
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94 | data.v = true; |
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95 | data.size = PAGESIZE_4M; |
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96 | data.pfn = fr.pfn; |
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97 | data.l = true; |
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98 | data.cp = 1; |
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99 | data.cv = 1; |
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100 | data.p = true; |
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101 | data.w = true; |
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102 | data.g = true; |
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103 | |||
104 | itlb_data_in_write(data.value); |
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105 | dtlb_data_in_write(data.value); |
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106 | |||
627 | jermar | 107 | /* |
108 | * Register window traps can occur before MMU is enabled again. |
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109 | * This ensures that any such traps will be handled from |
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110 | * kernel identity mapped trap handler. |
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111 | */ |
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112 | trap_switch_trap_table(); |
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113 | |||
619 | jermar | 114 | tlb_invalidate_all(); |
115 | |||
116 | dmmu_enable(); |
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117 | immu_enable(); |
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897 | jermar | 118 | } |
873 | jermar | 119 | |
897 | jermar | 120 | /** Insert privileged mapping into DMMU TLB. |
121 | * |
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122 | * @param page Virtual page address. |
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123 | * @param frame Physical frame address. |
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124 | * @param pagesize Page size. |
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125 | * @param locked True for permanent mappings, false otherwise. |
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126 | * @param cacheable True if the mapping is cacheable, false otherwise. |
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127 | */ |
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128 | void dtlb_insert_mapping(__address page, __address frame, int pagesize, bool locked, bool cacheable) |
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129 | { |
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130 | tlb_tag_access_reg_t tag; |
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131 | tlb_data_t data; |
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132 | page_address_t pg; |
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133 | frame_address_t fr; |
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873 | jermar | 134 | |
897 | jermar | 135 | pg.address = page; |
136 | fr.address = frame; |
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873 | jermar | 137 | |
894 | jermar | 138 | tag.value = ASID_KERNEL; |
139 | tag.vpn = pg.vpn; |
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140 | |||
141 | dtlb_tag_access_write(tag.value); |
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142 | |||
143 | data.value = 0; |
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144 | data.v = true; |
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897 | jermar | 145 | data.size = pagesize; |
894 | jermar | 146 | data.pfn = fr.pfn; |
897 | jermar | 147 | data.l = locked; |
148 | data.cp = cacheable; |
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149 | data.cv = cacheable; |
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894 | jermar | 150 | data.p = true; |
151 | data.w = true; |
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152 | data.g = true; |
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153 | |||
154 | dtlb_data_in_write(data.value); |
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570 | jermar | 155 | } |
156 | |||
863 | jermar | 157 | /** ITLB miss handler. */ |
158 | void fast_instruction_access_mmu_miss(void) |
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159 | { |
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160 | panic("%s\n", __FUNCTION__); |
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161 | } |
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162 | |||
163 | /** DTLB miss handler. */ |
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164 | void fast_data_access_mmu_miss(void) |
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165 | { |
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877 | jermar | 166 | tlb_tag_access_reg_t tag; |
167 | __address tpc; |
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873 | jermar | 168 | char *tpc_str; |
883 | jermar | 169 | |
877 | jermar | 170 | tag.value = dtlb_tag_access_read(); |
171 | if (tag.context != ASID_KERNEL || tag.vpn == 0) { |
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172 | tpc = tpc_read(); |
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173 | tpc_str = get_symtab_entry(tpc); |
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873 | jermar | 174 | |
877 | jermar | 175 | printf("Faulting page: %P, ASID=%d\n", tag.vpn * PAGE_SIZE, tag.context); |
176 | printf("TPC=%P, (%s)\n", tpc, tpc_str ? tpc_str : "?"); |
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177 | panic("%s\n", __FUNCTION__); |
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178 | } |
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179 | |||
180 | /* |
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181 | * Identity map piece of faulting kernel address space. |
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182 | */ |
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897 | jermar | 183 | dtlb_insert_mapping(tag.vpn * PAGE_SIZE, tag.vpn * FRAME_SIZE, PAGESIZE_8K, false, true); |
863 | jermar | 184 | } |
185 | |||
186 | /** DTLB protection fault handler. */ |
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187 | void fast_data_access_protection(void) |
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188 | { |
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189 | panic("%s\n", __FUNCTION__); |
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190 | } |
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191 | |||
570 | jermar | 192 | /** Print contents of both TLBs. */ |
193 | void tlb_print(void) |
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194 | { |
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195 | int i; |
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196 | tlb_data_t d; |
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197 | tlb_tag_read_reg_t t; |
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198 | |||
199 | printf("I-TLB contents:\n"); |
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200 | for (i = 0; i < ITLB_ENTRY_COUNT; i++) { |
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201 | d.value = itlb_data_access_read(i); |
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613 | jermar | 202 | t.value = itlb_tag_read_read(i); |
570 | jermar | 203 | |
617 | jermar | 204 | printf("%d: vpn=%Q, context=%d, v=%d, size=%d, nfo=%d, ie=%d, soft2=%X, diag=%X, pfn=%X, soft=%X, l=%d, cp=%d, cv=%d, e=%d, p=%d, w=%d, g=%d\n", |
205 | i, t.vpn, t.context, d.v, d.size, d.nfo, d.ie, d.soft2, d.diag, d.pfn, d.soft, d.l, d.cp, d.cv, d.e, d.p, d.w, d.g); |
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570 | jermar | 206 | } |
207 | |||
208 | printf("D-TLB contents:\n"); |
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209 | for (i = 0; i < DTLB_ENTRY_COUNT; i++) { |
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210 | d.value = dtlb_data_access_read(i); |
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613 | jermar | 211 | t.value = dtlb_tag_read_read(i); |
570 | jermar | 212 | |
617 | jermar | 213 | printf("%d: vpn=%Q, context=%d, v=%d, size=%d, nfo=%d, ie=%d, soft2=%X, diag=%X, pfn=%X, soft=%X, l=%d, cp=%d, cv=%d, e=%d, p=%d, w=%d, g=%d\n", |
214 | i, t.vpn, t.context, d.v, d.size, d.nfo, d.ie, d.soft2, d.diag, d.pfn, d.soft, d.l, d.cp, d.cv, d.e, d.p, d.w, d.g); |
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570 | jermar | 215 | } |
216 | |||
217 | } |
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617 | jermar | 218 | |
219 | /** Invalidate all unlocked ITLB and DTLB entries. */ |
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220 | void tlb_invalidate_all(void) |
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221 | { |
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222 | int i; |
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223 | tlb_data_t d; |
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224 | tlb_tag_read_reg_t t; |
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225 | |||
226 | for (i = 0; i < ITLB_ENTRY_COUNT; i++) { |
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227 | d.value = itlb_data_access_read(i); |
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228 | if (!d.l) { |
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229 | t.value = itlb_tag_read_read(i); |
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230 | d.v = false; |
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231 | itlb_tag_access_write(t.value); |
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232 | itlb_data_access_write(i, d.value); |
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233 | } |
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234 | } |
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235 | |||
236 | for (i = 0; i < DTLB_ENTRY_COUNT; i++) { |
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237 | d.value = dtlb_data_access_read(i); |
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238 | if (!d.l) { |
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239 | t.value = dtlb_tag_read_read(i); |
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240 | d.v = false; |
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241 | dtlb_tag_access_write(t.value); |
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242 | dtlb_data_access_write(i, d.value); |
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243 | } |
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244 | } |
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245 | |||
246 | } |
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247 | |||
248 | /** Invalidate all ITLB and DTLB entries that belong to specified ASID (Context). |
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249 | * |
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250 | * @param asid Address Space ID. |
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251 | */ |
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252 | void tlb_invalidate_asid(asid_t asid) |
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253 | { |
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254 | /* TODO: write asid to some Context register and encode the register in second parameter below. */ |
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255 | itlb_demap(TLB_DEMAP_CONTEXT, TLB_DEMAP_NUCLEUS, 0); |
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256 | dtlb_demap(TLB_DEMAP_CONTEXT, TLB_DEMAP_NUCLEUS, 0); |
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257 | } |
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258 | |||
727 | jermar | 259 | /** Invalidate all ITLB and DTLB entries for specified page range in specified address space. |
617 | jermar | 260 | * |
261 | * @param asid Address Space ID. |
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727 | jermar | 262 | * @param page First page which to sweep out from ITLB and DTLB. |
263 | * @param cnt Number of ITLB and DTLB entries to invalidate. |
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617 | jermar | 264 | */ |
727 | jermar | 265 | void tlb_invalidate_pages(asid_t asid, __address page, count_t cnt) |
617 | jermar | 266 | { |
727 | jermar | 267 | int i; |
268 | |||
269 | for (i = 0; i < cnt; i++) { |
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270 | /* TODO: write asid to some Context register and encode the register in second parameter below. */ |
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271 | itlb_demap(TLB_DEMAP_PAGE, TLB_DEMAP_NUCLEUS, page + i * PAGE_SIZE); |
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272 | dtlb_demap(TLB_DEMAP_PAGE, TLB_DEMAP_NUCLEUS, page + i * PAGE_SIZE); |
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273 | } |
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617 | jermar | 274 | } |