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| Rev | Author | Line No. | Line |
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| 173 | jermar | 1 | /* |
| 191 | decky | 2 | * Copyright (C) 2005 Martin Decky |
| 173 | jermar | 3 | * All rights reserved. |
| 4 | * |
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| 5 | * Redistribution and use in source and binary forms, with or without |
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| 6 | * modification, are permitted provided that the following conditions |
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| 7 | * are met: |
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| 8 | * |
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| 9 | * - Redistributions of source code must retain the above copyright |
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| 10 | * notice, this list of conditions and the following disclaimer. |
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| 11 | * - Redistributions in binary form must reproduce the above copyright |
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| 12 | * notice, this list of conditions and the following disclaimer in the |
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| 13 | * documentation and/or other materials provided with the distribution. |
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| 14 | * - The name of the author may not be used to endorse or promote products |
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| 15 | * derived from this software without specific prior written permission. |
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| 16 | * |
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| 17 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
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| 18 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
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| 19 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
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| 20 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
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| 21 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
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| 22 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
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| 23 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
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| 24 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
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| 25 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
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| 26 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
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| 27 | */ |
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| 28 | |||
| 342 | jermar | 29 | #ifndef __ppc32_ASM_H__ |
| 30 | #define __ppc32_ASM_H__ |
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| 173 | jermar | 31 | |
| 32 | #include <arch/types.h> |
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| 33 | #include <config.h> |
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| 34 | |||
| 413 | jermar | 35 | /** Enable interrupts. |
| 191 | decky | 36 | * |
| 37 | * Enable interrupts and return previous |
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| 38 | * value of EE. |
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| 413 | jermar | 39 | * |
| 40 | * @return Old interrupt priority level. |
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| 191 | decky | 41 | */ |
| 413 | jermar | 42 | static inline ipl_t interrupts_enable(void) { |
| 43 | ipl_t v; |
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| 44 | ipl_t tmp; |
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| 254 | decky | 45 | |
| 191 | decky | 46 | __asm__ volatile ( |
| 204 | decky | 47 | "mfmsr %0\n" |
| 254 | decky | 48 | "mfmsr %1\n" |
| 49 | "ori %1, %1, 1 << 15\n" |
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| 50 | "mtmsr %1\n" |
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| 51 | : "=r" (v), "=r" (tmp) |
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| 191 | decky | 52 | ); |
| 53 | return v; |
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| 54 | } |
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| 55 | |||
| 413 | jermar | 56 | /** Disable interrupts. |
| 191 | decky | 57 | * |
| 58 | * Disable interrupts and return previous |
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| 59 | * value of EE. |
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| 413 | jermar | 60 | * |
| 61 | * @return Old interrupt priority level. |
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| 191 | decky | 62 | */ |
| 413 | jermar | 63 | static inline ipl_t interrupts_disable(void) { |
| 64 | ipl_t v; |
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| 65 | ipl_t tmp; |
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| 254 | decky | 66 | |
| 191 | decky | 67 | __asm__ volatile ( |
| 204 | decky | 68 | "mfmsr %0\n" |
| 254 | decky | 69 | "mfmsr %1\n" |
| 70 | "rlwinm %1, %1, 0, 17, 15\n" |
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| 71 | "mtmsr %1\n" |
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| 72 | : "=r" (v), "=r" (tmp) |
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| 191 | decky | 73 | ); |
| 74 | return v; |
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| 75 | } |
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| 76 | |||
| 413 | jermar | 77 | /** Restore interrupt priority level. |
| 191 | decky | 78 | * |
| 79 | * Restore EE. |
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| 413 | jermar | 80 | * |
| 81 | * @param ipl Saved interrupt priority level. |
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| 191 | decky | 82 | */ |
| 413 | jermar | 83 | static inline void interrupts_restore(ipl_t ipl) { |
| 84 | ipl_t tmp; |
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| 254 | decky | 85 | |
| 191 | decky | 86 | __asm__ volatile ( |
| 254 | decky | 87 | "mfmsr %1\n" |
| 88 | "rlwimi %0, %1, 0, 17, 15\n" |
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| 89 | "cmpw 0, %0, %1\n" |
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| 210 | decky | 90 | "beq 0f\n" |
| 204 | decky | 91 | "mtmsr %0\n" |
| 210 | decky | 92 | "0:\n" |
| 413 | jermar | 93 | : "=r" (ipl), "=r" (tmp) |
| 94 | : "0" (ipl) |
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| 191 | decky | 95 | ); |
| 96 | } |
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| 97 | |||
| 413 | jermar | 98 | /** Return interrupt priority level. |
| 210 | decky | 99 | * |
| 100 | * Return EE. |
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| 413 | jermar | 101 | * |
| 102 | * @return Current interrupt priority level. |
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| 210 | decky | 103 | */ |
| 413 | jermar | 104 | static inline ipl_t interrupts_read(void) { |
| 105 | ipl_t v; |
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| 210 | decky | 106 | __asm__ volatile ( |
| 107 | "mfmsr %0\n" |
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| 108 | : "=r" (v) |
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| 109 | ); |
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| 110 | return v; |
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| 111 | } |
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| 112 | |||
| 253 | jermar | 113 | /** Return base address of current stack. |
| 114 | * |
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| 115 | * Return the base address of the current stack. |
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| 116 | * The stack is assumed to be STACK_SIZE bytes long. |
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| 117 | * The stack must start on page boundary. |
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| 118 | */ |
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| 173 | jermar | 119 | static inline __address get_stack_base(void) |
| 120 | { |
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| 253 | jermar | 121 | __address v; |
| 122 | |||
| 123 | __asm__ volatile ("and %0, %%r1, %1\n" : "=r" (v) : "r" (~(STACK_SIZE-1))); |
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| 124 | |||
| 125 | return v; |
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| 173 | jermar | 126 | } |
| 127 | |||
| 254 | decky | 128 | void cpu_halt(void); |
| 201 | decky | 129 | void cpu_sleep(void); |
| 130 | void asm_delay_loop(__u32 t); |
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| 131 | |||
| 173 | jermar | 132 | #endif |