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1 | jermar | 1 | /* |
319 | jermar | 2 | * Copyright (C) 2003-2004 Jakub Jermar |
1 | jermar | 3 | * All rights reserved. |
4 | * |
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5 | * Redistribution and use in source and binary forms, with or without |
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6 | * modification, are permitted provided that the following conditions |
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7 | * are met: |
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8 | * |
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9 | * - Redistributions of source code must retain the above copyright |
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10 | * notice, this list of conditions and the following disclaimer. |
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11 | * - Redistributions in binary form must reproduce the above copyright |
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12 | * notice, this list of conditions and the following disclaimer in the |
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13 | * documentation and/or other materials provided with the distribution. |
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14 | * - The name of the author may not be used to endorse or promote products |
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15 | * derived from this software without specific prior written permission. |
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16 | * |
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17 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
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18 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
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19 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
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20 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
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21 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
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22 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
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23 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
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24 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
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25 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
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26 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
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27 | */ |
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28 | |||
575 | palkovsky | 29 | #include <interrupt.h> |
1 | jermar | 30 | #include <arch/interrupt.h> |
31 | #include <arch/types.h> |
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32 | #include <arch.h> |
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33 | #include <arch/cp0.h> |
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34 | #include <time/clock.h> |
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332 | palkovsky | 35 | #include <arch/drivers/arc.h> |
1 | jermar | 36 | |
413 | jermar | 37 | /** Disable interrupts. |
38 | * |
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39 | * @return Old interrupt priority level. |
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40 | */ |
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41 | ipl_t interrupts_disable(void) |
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1 | jermar | 42 | { |
413 | jermar | 43 | ipl_t ipl = (ipl_t) cp0_status_read(); |
44 | cp0_status_write(ipl & ~cp0_status_ie_enabled_bit); |
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45 | return ipl; |
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1 | jermar | 46 | } |
47 | |||
413 | jermar | 48 | /** Enable interrupts. |
49 | * |
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50 | * @return Old interrupt priority level. |
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51 | */ |
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52 | ipl_t interrupts_enable(void) |
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1 | jermar | 53 | { |
413 | jermar | 54 | ipl_t ipl = (ipl_t) cp0_status_read(); |
55 | cp0_status_write(ipl | cp0_status_ie_enabled_bit); |
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56 | return ipl; |
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1 | jermar | 57 | } |
58 | |||
413 | jermar | 59 | /** Restore interrupt priority level. |
60 | * |
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61 | * @param ipl Saved interrupt priority level. |
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62 | */ |
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63 | void interrupts_restore(ipl_t ipl) |
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1 | jermar | 64 | { |
413 | jermar | 65 | cp0_status_write(cp0_status_read() | (ipl & cp0_status_ie_enabled_bit)); |
1 | jermar | 66 | } |
67 | |||
413 | jermar | 68 | /** Read interrupt priority level. |
69 | * |
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70 | * @return Current interrupt priority level. |
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71 | */ |
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72 | ipl_t interrupts_read(void) |
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1 | jermar | 73 | { |
125 | jermar | 74 | return cp0_status_read(); |
1 | jermar | 75 | } |
76 | |||
575 | palkovsky | 77 | static void timer_exception(int n, void *stack) |
78 | { |
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79 | cp0_compare_write(cp0_count_read() + cp0_compare_value); |
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80 | clock(); |
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81 | } |
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82 | |||
83 | static void swint0(int n, void *stack) |
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84 | { |
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85 | cp0_cause_write(cp0_cause_read() & ~(1 << 8)); /* clear SW0 interrupt */ |
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86 | } |
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87 | |||
88 | static void swint1(int n, void *stack) |
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89 | { |
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90 | cp0_cause_write(cp0_cause_read() & ~(1 << 9)); /* clear SW1 interrupt */ |
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91 | } |
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92 | |||
93 | /* Initialize basic tables for exception dispatching */ |
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94 | void interrupt_init(void) |
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95 | { |
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96 | int i; |
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97 | |||
590 | palkovsky | 98 | int_register(TIMER_IRQ, "timer", timer_exception); |
99 | int_register(0, "swint0", swint0); |
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100 | int_register(1, "swint1", swint1); |
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1 | jermar | 101 | } |