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| Rev | Author | Line No. | Line |
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| 1 | jermar | 1 | /* |
| 319 | jermar | 2 | * Copyright (C) 2003-2004 Jakub Jermar |
| 1 | jermar | 3 | * All rights reserved. |
| 4 | * |
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| 5 | * Redistribution and use in source and binary forms, with or without |
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| 6 | * modification, are permitted provided that the following conditions |
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| 7 | * are met: |
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| 8 | * |
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| 9 | * - Redistributions of source code must retain the above copyright |
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| 10 | * notice, this list of conditions and the following disclaimer. |
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| 11 | * - Redistributions in binary form must reproduce the above copyright |
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| 12 | * notice, this list of conditions and the following disclaimer in the |
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| 13 | * documentation and/or other materials provided with the distribution. |
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| 14 | * - The name of the author may not be used to endorse or promote products |
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| 15 | * derived from this software without specific prior written permission. |
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| 16 | * |
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| 17 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
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| 18 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
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| 19 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
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| 20 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
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| 21 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
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| 22 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
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| 23 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
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| 24 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
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| 25 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
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| 26 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
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| 27 | */ |
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| 28 | |||
| 575 | palkovsky | 29 | #include <interrupt.h> |
| 1 | jermar | 30 | #include <arch/interrupt.h> |
| 31 | #include <arch/types.h> |
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| 32 | #include <arch.h> |
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| 33 | #include <arch/cp0.h> |
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| 34 | #include <time/clock.h> |
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| 332 | palkovsky | 35 | #include <arch/drivers/arc.h> |
| 1 | jermar | 36 | |
| 1258 | palkovsky | 37 | #include <ipc/sysipc.h> |
| 38 | |||
| 413 | jermar | 39 | /** Disable interrupts. |
| 40 | * |
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| 41 | * @return Old interrupt priority level. |
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| 42 | */ |
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| 43 | ipl_t interrupts_disable(void) |
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| 1 | jermar | 44 | { |
| 413 | jermar | 45 | ipl_t ipl = (ipl_t) cp0_status_read(); |
| 46 | cp0_status_write(ipl & ~cp0_status_ie_enabled_bit); |
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| 47 | return ipl; |
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| 1 | jermar | 48 | } |
| 49 | |||
| 413 | jermar | 50 | /** Enable interrupts. |
| 51 | * |
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| 52 | * @return Old interrupt priority level. |
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| 53 | */ |
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| 54 | ipl_t interrupts_enable(void) |
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| 1 | jermar | 55 | { |
| 413 | jermar | 56 | ipl_t ipl = (ipl_t) cp0_status_read(); |
| 57 | cp0_status_write(ipl | cp0_status_ie_enabled_bit); |
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| 58 | return ipl; |
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| 1 | jermar | 59 | } |
| 60 | |||
| 413 | jermar | 61 | /** Restore interrupt priority level. |
| 62 | * |
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| 63 | * @param ipl Saved interrupt priority level. |
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| 64 | */ |
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| 65 | void interrupts_restore(ipl_t ipl) |
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| 1 | jermar | 66 | { |
| 413 | jermar | 67 | cp0_status_write(cp0_status_read() | (ipl & cp0_status_ie_enabled_bit)); |
| 1 | jermar | 68 | } |
| 69 | |||
| 413 | jermar | 70 | /** Read interrupt priority level. |
| 71 | * |
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| 72 | * @return Current interrupt priority level. |
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| 73 | */ |
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| 74 | ipl_t interrupts_read(void) |
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| 1 | jermar | 75 | { |
| 125 | jermar | 76 | return cp0_status_read(); |
| 1 | jermar | 77 | } |
| 78 | |||
| 1434 | palkovsky | 79 | /* TODO: This is SMP unsafe!!! */ |
| 80 | static unsigned long nextcount; |
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| 81 | /** Start hardware clock */ |
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| 82 | static void timer_start(void) |
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| 83 | { |
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| 84 | nextcount = cp0_compare_value + cp0_count_read(); |
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| 85 | cp0_compare_write(nextcount); |
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| 86 | } |
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| 87 | |||
| 958 | jermar | 88 | static void timer_exception(int n, istate_t *istate) |
| 575 | palkovsky | 89 | { |
| 1434 | palkovsky | 90 | unsigned long drift; |
| 91 | |||
| 92 | drift = cp0_count_read() - nextcount; |
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| 93 | while (drift > cp0_compare_value) { |
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| 94 | drift -= cp0_compare_value; |
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| 95 | CPU->missed_clock_ticks++; |
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| 96 | } |
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| 97 | nextcount = cp0_count_read() + cp0_compare_value - drift; |
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| 98 | cp0_compare_write(nextcount); |
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| 575 | palkovsky | 99 | clock(); |
| 100 | } |
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| 101 | |||
| 958 | jermar | 102 | static void swint0(int n, istate_t *istate) |
| 575 | palkovsky | 103 | { |
| 104 | cp0_cause_write(cp0_cause_read() & ~(1 << 8)); /* clear SW0 interrupt */ |
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| 1258 | palkovsky | 105 | ipc_irq_send_notif(0); |
| 575 | palkovsky | 106 | } |
| 107 | |||
| 958 | jermar | 108 | static void swint1(int n, istate_t *istate) |
| 575 | palkovsky | 109 | { |
| 110 | cp0_cause_write(cp0_cause_read() & ~(1 << 9)); /* clear SW1 interrupt */ |
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| 1258 | palkovsky | 111 | ipc_irq_send_notif(1); |
| 575 | palkovsky | 112 | } |
| 113 | |||
| 114 | /* Initialize basic tables for exception dispatching */ |
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| 115 | void interrupt_init(void) |
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| 116 | { |
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| 590 | palkovsky | 117 | int_register(TIMER_IRQ, "timer", timer_exception); |
| 118 | int_register(0, "swint0", swint0); |
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| 119 | int_register(1, "swint1", swint1); |
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| 1434 | palkovsky | 120 | timer_start(); |
| 1 | jermar | 121 | } |
| 1258 | palkovsky | 122 | |
| 123 | static void ipc_int(int n, istate_t *istate) |
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| 124 | { |
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| 125 | ipc_irq_send_notif(n-INT_OFFSET); |
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| 126 | } |
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| 127 | |||
| 128 | /* Reregister irq to be IPC-ready */ |
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| 129 | void irq_ipc_bind_arch(__native irq) |
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| 130 | { |
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| 131 | /* Do not allow to redefine timer */ |
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| 132 | /* Swint0, Swint1 are already handled */ |
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| 133 | if (irq == TIMER_IRQ || irq < 2) |
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| 134 | return; |
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| 135 | int_register(irq, "ipc_int", ipc_int); |
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| 136 | } |