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684 | jermar | 1 | /* |
2 | * Copyright (C) 2006 Jakub Jermar |
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747 | jermar | 3 | * Copyright (C) 2006 Jakub Vana |
684 | jermar | 4 | * All rights reserved. |
5 | * |
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6 | * Redistribution and use in source and binary forms, with or without |
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7 | * modification, are permitted provided that the following conditions |
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8 | * are met: |
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9 | * |
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10 | * - Redistributions of source code must retain the above copyright |
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11 | * notice, this list of conditions and the following disclaimer. |
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12 | * - Redistributions in binary form must reproduce the above copyright |
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13 | * notice, this list of conditions and the following disclaimer in the |
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14 | * documentation and/or other materials provided with the distribution. |
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15 | * - The name of the author may not be used to endorse or promote products |
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16 | * derived from this software without specific prior written permission. |
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17 | * |
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18 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
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19 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
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20 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
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21 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
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22 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
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23 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
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24 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
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25 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
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26 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
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27 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
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28 | */ |
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29 | |||
30 | #include <arch/mm/page.h> |
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747 | jermar | 31 | #include <genarch/mm/page_ht.h> |
32 | #include <mm/asid.h> |
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749 | jermar | 33 | #include <arch/mm/asid.h> |
1210 | vana | 34 | #include <arch/mm/vhpt.h> |
716 | vana | 35 | #include <arch/types.h> |
749 | jermar | 36 | #include <typedefs.h> |
728 | vana | 37 | #include <print.h> |
684 | jermar | 38 | #include <mm/page.h> |
747 | jermar | 39 | #include <mm/frame.h> |
684 | jermar | 40 | #include <config.h> |
41 | #include <panic.h> |
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746 | jermar | 42 | #include <arch/asm.h> |
747 | jermar | 43 | #include <arch/barrier.h> |
748 | jermar | 44 | #include <memstr.h> |
684 | jermar | 45 | |
792 | jermar | 46 | static void set_environment(void); |
749 | jermar | 47 | |
48 | /** Initialize ia64 virtual address translation subsystem. */ |
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49 | void page_arch_init(void) |
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50 | { |
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793 | jermar | 51 | page_mapping_operations = &ht_mapping_operations; |
749 | jermar | 52 | pk_disable(); |
792 | jermar | 53 | set_environment(); |
749 | jermar | 54 | } |
55 | |||
747 | jermar | 56 | /** Initialize VHPT and region registers. */ |
792 | jermar | 57 | void set_environment(void) |
716 | vana | 58 | { |
747 | jermar | 59 | region_register rr; |
60 | pta_register pta; |
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61 | int i; |
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1210 | vana | 62 | #ifdef CONFIG_VHPT |
63 | __address vhpt_base; |
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64 | #endif |
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869 | vana | 65 | |
747 | jermar | 66 | /* |
67 | * First set up kernel region register. |
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901 | jermar | 68 | * This is redundant (see start.S) but we keep it here just for sure. |
747 | jermar | 69 | */ |
70 | rr.word = rr_read(VRN_KERNEL); |
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71 | rr.map.ve = 0; /* disable VHPT walker */ |
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72 | rr.map.ps = PAGE_WIDTH; |
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901 | jermar | 73 | rr.map.rid = ASID2RID(ASID_KERNEL, VRN_KERNEL); |
747 | jermar | 74 | rr_write(VRN_KERNEL, rr.word); |
75 | srlz_i(); |
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76 | srlz_d(); |
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901 | jermar | 77 | |
747 | jermar | 78 | /* |
902 | jermar | 79 | * And setup the rest of region register. |
747 | jermar | 80 | */ |
81 | for(i = 0; i < REGION_REGISTERS; i++) { |
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82 | /* skip kernel rr */ |
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83 | if (i == VRN_KERNEL) |
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84 | continue; |
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728 | vana | 85 | |
904 | jermar | 86 | rr.word = rr_read(i); |
748 | jermar | 87 | rr.map.ve = 0; /* disable VHPT walker */ |
902 | jermar | 88 | rr.map.rid = RID_KERNEL; |
89 | rr.map.ps = PAGE_WIDTH; |
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747 | jermar | 90 | rr_write(i, rr.word); |
91 | srlz_i(); |
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92 | srlz_d(); |
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93 | } |
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726 | jermar | 94 | |
1210 | vana | 95 | #ifdef CONFIG_VHPT |
96 | vhpt_base = vhpt_set_up(); |
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97 | #endif |
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715 | vana | 98 | /* |
747 | jermar | 99 | * Set up PTA register. |
100 | */ |
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101 | pta.word = pta_read(); |
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1210 | vana | 102 | #ifndef CONFIG_VHPT |
747 | jermar | 103 | pta.map.ve = 0; /* disable VHPT walker */ |
1210 | vana | 104 | pta.map.base = 0 >> PTA_BASE_SHIFT; |
105 | #else |
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106 | pta.map.ve = 1; /* enable VHPT walker */ |
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107 | pta.map.base = vhpt_base >> PTA_BASE_SHIFT; |
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108 | #endif |
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747 | jermar | 109 | pta.map.vf = 1; /* large entry format */ |
110 | pta.map.size = VHPT_WIDTH; |
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111 | pta_write(pta.word); |
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112 | srlz_i(); |
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113 | srlz_d(); |
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114 | } |
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728 | vana | 115 | |
748 | jermar | 116 | /** Calculate address of collision chain from VPN and ASID. |
117 | * |
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749 | jermar | 118 | * Interrupts must be disabled. |
748 | jermar | 119 | * |
120 | * @param page Address of virtual page including VRN bits. |
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121 | * @param asid Address space identifier. |
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122 | * |
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792 | jermar | 123 | * @return VHPT entry address. |
748 | jermar | 124 | */ |
792 | jermar | 125 | vhpt_entry_t *vhpt_hash(__address page, asid_t asid) |
748 | jermar | 126 | { |
127 | region_register rr_save, rr; |
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749 | jermar | 128 | index_t vrn; |
129 | rid_t rid; |
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792 | jermar | 130 | vhpt_entry_t *v; |
748 | jermar | 131 | |
749 | jermar | 132 | vrn = page >> VRN_SHIFT; |
133 | rid = ASID2RID(asid, vrn); |
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134 | |||
135 | rr_save.word = rr_read(vrn); |
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136 | if (rr_save.map.rid == rid) { |
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137 | /* |
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138 | * The RID is already in place, compute thash and return. |
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139 | */ |
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792 | jermar | 140 | v = (vhpt_entry_t *) thash(page); |
141 | return v; |
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749 | jermar | 142 | } |
143 | |||
144 | /* |
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145 | * The RID must be written to some region register. |
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146 | * To speed things up, register indexed by vrn is used. |
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147 | */ |
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748 | jermar | 148 | rr.word = rr_save.word; |
749 | jermar | 149 | rr.map.rid = rid; |
150 | rr_write(vrn, rr.word); |
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748 | jermar | 151 | srlz_i(); |
792 | jermar | 152 | v = (vhpt_entry_t *) thash(page); |
749 | jermar | 153 | rr_write(vrn, rr_save.word); |
748 | jermar | 154 | srlz_i(); |
155 | srlz_d(); |
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156 | |||
792 | jermar | 157 | return v; |
748 | jermar | 158 | } |
749 | jermar | 159 | |
160 | /** Compare ASID and VPN against PTE. |
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161 | * |
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162 | * Interrupts must be disabled. |
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163 | * |
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164 | * @param page Address of virtual page including VRN bits. |
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165 | * @param asid Address space identifier. |
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166 | * |
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167 | * @return True if page and asid match the page and asid of t, false otherwise. |
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168 | */ |
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792 | jermar | 169 | bool vhpt_compare(__address page, asid_t asid, vhpt_entry_t *v) |
749 | jermar | 170 | { |
171 | region_register rr_save, rr; |
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172 | index_t vrn; |
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173 | rid_t rid; |
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174 | bool match; |
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175 | |||
792 | jermar | 176 | ASSERT(v); |
749 | jermar | 177 | |
178 | vrn = page >> VRN_SHIFT; |
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179 | rid = ASID2RID(asid, vrn); |
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180 | |||
181 | rr_save.word = rr_read(vrn); |
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182 | if (rr_save.map.rid == rid) { |
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183 | /* |
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184 | * The RID is already in place, compare ttag with t and return. |
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185 | */ |
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792 | jermar | 186 | return ttag(page) == v->present.tag.tag_word; |
749 | jermar | 187 | } |
188 | |||
189 | /* |
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190 | * The RID must be written to some region register. |
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191 | * To speed things up, register indexed by vrn is used. |
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192 | */ |
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193 | rr.word = rr_save.word; |
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194 | rr.map.rid = rid; |
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195 | rr_write(vrn, rr.word); |
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196 | srlz_i(); |
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792 | jermar | 197 | match = (ttag(page) == v->present.tag.tag_word); |
749 | jermar | 198 | rr_write(vrn, rr_save.word); |
199 | srlz_i(); |
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200 | srlz_d(); |
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201 | |||
202 | return match; |
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203 | } |
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204 | |||
205 | /** Set up one VHPT entry. |
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206 | * |
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207 | * @param t VHPT entry to be set up. |
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208 | * @param page Virtual address of the page mapped by the entry. |
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209 | * @param asid Address space identifier of the address space to which page belongs. |
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210 | * @param frame Physical address of the frame to wich page is mapped. |
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211 | * @param flags Different flags for the mapping. |
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212 | */ |
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792 | jermar | 213 | void vhpt_set_record(vhpt_entry_t *v, __address page, asid_t asid, __address frame, int flags) |
749 | jermar | 214 | { |
215 | region_register rr_save, rr; |
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216 | index_t vrn; |
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217 | rid_t rid; |
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218 | __u64 tag; |
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219 | |||
792 | jermar | 220 | ASSERT(v); |
749 | jermar | 221 | |
222 | vrn = page >> VRN_SHIFT; |
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223 | rid = ASID2RID(asid, vrn); |
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224 | |||
225 | /* |
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226 | * Compute ttag. |
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227 | */ |
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228 | rr_save.word = rr_read(vrn); |
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229 | rr.word = rr_save.word; |
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230 | rr.map.rid = rid; |
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231 | rr_write(vrn, rr.word); |
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232 | srlz_i(); |
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233 | tag = ttag(page); |
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234 | rr_write(vrn, rr_save.word); |
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235 | srlz_i(); |
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236 | srlz_d(); |
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237 | |||
238 | /* |
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239 | * Clear the entry. |
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240 | */ |
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792 | jermar | 241 | v->word[0] = 0; |
242 | v->word[1] = 0; |
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243 | v->word[2] = 0; |
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244 | v->word[3] = 0; |
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749 | jermar | 245 | |
792 | jermar | 246 | v->present.p = true; |
247 | v->present.ma = (flags & PAGE_CACHEABLE) ? MA_WRITEBACK : MA_UNCACHEABLE; |
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248 | v->present.a = false; /* not accessed */ |
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249 | v->present.d = false; /* not dirty */ |
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250 | v->present.pl = (flags & PAGE_USER) ? PL_USER : PL_KERNEL; |
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251 | v->present.ar = (flags & PAGE_WRITE) ? AR_WRITE : AR_READ; |
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252 | v->present.ar |= (flags & PAGE_EXEC) ? AR_EXECUTE : 0; |
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253 | v->present.ppn = frame >> PPN_SHIFT; |
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254 | v->present.ed = false; /* exception not deffered */ |
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255 | v->present.ps = PAGE_WIDTH; |
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256 | v->present.key = 0; |
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257 | v->present.tag.tag_word = tag; |
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749 | jermar | 258 | } |