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| Rev | Author | Line No. | Line |
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| 756 | jermar | 1 | /* |
| 2 | * Copyright (C) 2006 Jakub Jermar |
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| 3 | * All rights reserved. |
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| 4 | * |
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| 5 | * Redistribution and use in source and binary forms, with or without |
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| 6 | * modification, are permitted provided that the following conditions |
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| 7 | * are met: |
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| 8 | * |
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| 9 | * - Redistributions of source code must retain the above copyright |
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| 10 | * notice, this list of conditions and the following disclaimer. |
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| 11 | * - Redistributions in binary form must reproduce the above copyright |
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| 12 | * notice, this list of conditions and the following disclaimer in the |
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| 13 | * documentation and/or other materials provided with the distribution. |
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| 14 | * - The name of the author may not be used to endorse or promote products |
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| 15 | * derived from this software without specific prior written permission. |
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| 16 | * |
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| 17 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
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| 18 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
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| 19 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
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| 20 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
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| 21 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
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| 22 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
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| 23 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
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| 24 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
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| 25 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
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| 26 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
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| 27 | */ |
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| 28 | |||
| 29 | #include <arch/mm/as.h> |
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| 903 | jermar | 30 | #include <arch/mm/asid.h> |
| 31 | #include <arch/mm/page.h> |
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| 756 | jermar | 32 | #include <genarch/mm/as_ht.h> |
| 830 | jermar | 33 | #include <genarch/mm/asid_fifo.h> |
| 903 | jermar | 34 | #include <mm/asid.h> |
| 35 | #include <arch.h> |
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| 36 | #include <arch/barrier.h> |
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| 37 | #include <synch/spinlock.h> |
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| 756 | jermar | 38 | |
| 39 | /** Architecture dependent address space init. */ |
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| 40 | void as_arch_init(void) |
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| 41 | { |
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| 42 | as_operations = &as_ht_operations; |
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| 830 | jermar | 43 | asid_fifo_init(); |
| 756 | jermar | 44 | } |
| 903 | jermar | 45 | |
| 46 | /** Prepare registers for switching to another address space. |
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| 47 | * |
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| 48 | * @param as Address space. |
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| 49 | */ |
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| 50 | void as_install_arch(as_t *as) |
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| 51 | { |
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| 52 | ipl_t ipl; |
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| 53 | region_register rr; |
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| 54 | int i; |
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| 55 | |||
| 56 | ipl = interrupts_disable(); |
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| 57 | spinlock_lock(&as->lock); |
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| 58 | |||
| 59 | ASSERT(as->asid != ASID_INVALID); |
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| 60 | |||
| 61 | /* |
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| 62 | * Load respective ASID (7 consecutive RIDs) to |
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| 63 | * region registers. |
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| 64 | */ |
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| 65 | for (i = 0; i < REGION_REGISTERS; i++) { |
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| 66 | if (i == VRN_KERNEL) |
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| 67 | continue; |
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| 68 | |||
| 69 | rr.word = rr_read(i); |
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| 70 | rr.map.ve = false; /* disable VHPT walker */ |
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| 71 | rr.map.rid = ASID2RID(as->asid, i); |
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| 72 | rr.map.ps = PAGE_WIDTH; |
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| 73 | rr_write(i, rr.word); |
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| 74 | } |
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| 75 | srlz_d(); |
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| 76 | srlz_i(); |
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| 77 | |||
| 78 | spinlock_unlock(&as->lock); |
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| 79 | interrupts_restore(ipl); |
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| 80 | } |