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| Rev | Author | Line No. | Line |
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| 36 | jermar | 1 | /* |
| 2 | * Copyright (C) 2005 Jakub Jermar |
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| 3 | * All rights reserved. |
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| 4 | * |
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| 5 | * Redistribution and use in source and binary forms, with or without |
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| 6 | * modification, are permitted provided that the following conditions |
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| 7 | * are met: |
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| 8 | * |
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| 9 | * - Redistributions of source code must retain the above copyright |
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| 10 | * notice, this list of conditions and the following disclaimer. |
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| 11 | * - Redistributions in binary form must reproduce the above copyright |
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| 12 | * notice, this list of conditions and the following disclaimer in the |
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| 13 | * documentation and/or other materials provided with the distribution. |
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| 14 | * - The name of the author may not be used to endorse or promote products |
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| 15 | * derived from this software without specific prior written permission. |
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| 16 | * |
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| 17 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
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| 18 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
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| 19 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
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| 20 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
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| 21 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
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| 22 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
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| 23 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
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| 24 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
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| 25 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
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| 26 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
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| 27 | */ |
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| 28 | |||
| 78 | jermar | 29 | #include <arch.h> |
| 30 | #include <arch/ski/ski.h> |
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| 435 | jermar | 31 | #include <arch/drivers/it.h> |
| 470 | jermar | 32 | #include <arch/interrupt.h> |
| 33 | #include <arch/barrier.h> |
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| 919 | jermar | 34 | #include <arch/asm.h> |
| 35 | #include <arch/register.h> |
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| 470 | jermar | 36 | #include <arch/types.h> |
| 919 | jermar | 37 | #include <arch/context.h> |
| 962 | jermar | 38 | #include <arch/stack.h> |
| 919 | jermar | 39 | #include <arch/mm/page.h> |
| 40 | #include <mm/as.h> |
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| 41 | #include <config.h> |
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| 42 | #include <userspace.h> |
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| 519 | vana | 43 | #include <console/console.h> |
| 44 | |||
| 78 | jermar | 45 | void arch_pre_mm_init(void) |
| 46 | { |
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| 470 | jermar | 47 | /* Set Interruption Vector Address (i.e. location of interruption vector table). */ |
| 48 | iva_write((__address) &ivt); |
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| 49 | srlz_d(); |
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| 50 | |||
| 102 | jermar | 51 | ski_init_console(); |
| 435 | jermar | 52 | it_init(); |
| 1039 | decky | 53 | |
| 54 | /* Setup usermode */ |
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| 55 | init.cnt = 1; |
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| 56 | init.tasks[0].addr = INIT_ADDRESS; |
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| 57 | init.tasks[0].size = INIT_SIZE; |
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| 78 | jermar | 58 | } |
| 59 | |||
| 60 | void arch_post_mm_init(void) |
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| 61 | { |
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| 62 | } |
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| 503 | jermar | 63 | |
| 64 | void arch_pre_smp_init(void) |
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| 65 | { |
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| 66 | } |
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| 67 | |||
| 68 | void arch_post_smp_init(void) |
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| 69 | { |
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| 70 | } |
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| 919 | jermar | 71 | |
| 72 | /** Enter userspace and never return. */ |
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| 938 | jermar | 73 | void userspace(__address entry) |
| 919 | jermar | 74 | { |
| 75 | psr_t psr; |
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| 76 | rsc_t rsc; |
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| 77 | |||
| 78 | psr.value = psr_read(); |
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| 79 | psr.cpl = PL_USER; |
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| 80 | psr.i = true; /* start with interrupts enabled */ |
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| 81 | psr.ic = true; |
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| 82 | psr.ri = 0; /* start with instruction #0 */ |
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| 993 | jermar | 83 | psr.bn = 1; /* start in bank 0 */ |
| 919 | jermar | 84 | |
| 85 | __asm__ volatile ("mov %0 = ar.rsc\n" : "=r" (rsc.value)); |
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| 86 | rsc.loadrs = 0; |
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| 87 | rsc.be = false; |
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| 88 | rsc.pl = PL_USER; |
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| 89 | rsc.mode = 3; /* eager mode */ |
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| 90 | |||
| 962 | jermar | 91 | switch_to_userspace(entry, USTACK_ADDRESS+PAGE_SIZE-ALIGN_UP(STACK_ITEM_SIZE, STACK_ALIGNMENT), USTACK_ADDRESS, psr.value, rsc.value); |
| 919 | jermar | 92 | |
| 93 | while (1) { |
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| 94 | ; |
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| 95 | } |
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| 96 | } |