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| Rev | Author | Line No. | Line |
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| 36 | jermar | 1 | /* |
| 2 | * Copyright (C) 2005 Jakub Jermar |
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| 3 | * All rights reserved. |
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| 4 | * |
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| 5 | * Redistribution and use in source and binary forms, with or without |
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| 6 | * modification, are permitted provided that the following conditions |
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| 7 | * are met: |
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| 8 | * |
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| 9 | * - Redistributions of source code must retain the above copyright |
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| 10 | * notice, this list of conditions and the following disclaimer. |
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| 11 | * - Redistributions in binary form must reproduce the above copyright |
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| 12 | * notice, this list of conditions and the following disclaimer in the |
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| 13 | * documentation and/or other materials provided with the distribution. |
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| 14 | * - The name of the author may not be used to endorse or promote products |
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| 15 | * derived from this software without specific prior written permission. |
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| 16 | * |
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| 17 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
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| 18 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
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| 19 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
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| 20 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
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| 21 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
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| 22 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
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| 23 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
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| 24 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
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| 25 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
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| 26 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
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| 27 | */ |
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| 28 | |||
| 78 | jermar | 29 | #include <arch.h> |
| 30 | #include <arch/ski/ski.h> |
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| 435 | jermar | 31 | #include <arch/drivers/it.h> |
| 470 | jermar | 32 | #include <arch/interrupt.h> |
| 33 | #include <arch/barrier.h> |
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| 919 | jermar | 34 | #include <arch/asm.h> |
| 35 | #include <arch/register.h> |
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| 470 | jermar | 36 | #include <arch/types.h> |
| 919 | jermar | 37 | #include <arch/context.h> |
| 962 | jermar | 38 | #include <arch/stack.h> |
| 919 | jermar | 39 | #include <arch/mm/page.h> |
| 40 | #include <mm/as.h> |
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| 41 | #include <config.h> |
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| 42 | #include <userspace.h> |
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| 519 | vana | 43 | #include <console/console.h> |
| 1078 | jermar | 44 | #include <proc/uarg.h> |
| 1121 | jermar | 45 | #include <syscall/syscall.h> |
| 519 | vana | 46 | |
| 1223 | jermar | 47 | void arch_pre_main(void) |
| 48 | { |
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| 49 | /* Setup usermode init tasks. */ |
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| 1495 | jermar | 50 | init.cnt = 5; |
| 1223 | jermar | 51 | init.tasks[0].addr = INIT0_ADDRESS; |
| 52 | init.tasks[0].size = INIT0_SIZE; |
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| 1495 | jermar | 53 | init.tasks[1].addr = INIT0_ADDRESS + 0x400000; |
| 54 | init.tasks[1].size = INIT0_SIZE; |
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| 55 | init.tasks[2].addr = INIT0_ADDRESS + 0x800000; |
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| 56 | init.tasks[2].size = INIT0_SIZE; |
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| 57 | init.tasks[3].addr = INIT0_ADDRESS + 0xc00000; |
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| 58 | init.tasks[3].size = INIT0_SIZE; |
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| 59 | init.tasks[4].addr = INIT0_ADDRESS + 0x1000000; |
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| 60 | init.tasks[4].size = INIT0_SIZE; |
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| 1223 | jermar | 61 | } |
| 62 | |||
| 78 | jermar | 63 | void arch_pre_mm_init(void) |
| 64 | { |
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| 470 | jermar | 65 | /* Set Interruption Vector Address (i.e. location of interruption vector table). */ |
| 66 | iva_write((__address) &ivt); |
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| 67 | srlz_d(); |
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| 68 | |||
| 102 | jermar | 69 | ski_init_console(); |
| 1223 | jermar | 70 | it_init(); |
| 78 | jermar | 71 | } |
| 72 | |||
| 73 | void arch_post_mm_init(void) |
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| 74 | { |
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| 1507 | vana | 75 | ski_set_console_sysinfo(); |
| 78 | jermar | 76 | } |
| 503 | jermar | 77 | |
| 78 | void arch_pre_smp_init(void) |
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| 79 | { |
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| 80 | } |
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| 81 | |||
| 82 | void arch_post_smp_init(void) |
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| 83 | { |
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| 84 | } |
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| 919 | jermar | 85 | |
| 86 | /** Enter userspace and never return. */ |
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| 1078 | jermar | 87 | void userspace(uspace_arg_t *kernel_uarg) |
| 919 | jermar | 88 | { |
| 89 | psr_t psr; |
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| 90 | rsc_t rsc; |
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| 91 | |||
| 92 | psr.value = psr_read(); |
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| 93 | psr.cpl = PL_USER; |
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| 94 | psr.i = true; /* start with interrupts enabled */ |
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| 95 | psr.ic = true; |
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| 96 | psr.ri = 0; /* start with instruction #0 */ |
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| 993 | jermar | 97 | psr.bn = 1; /* start in bank 0 */ |
| 919 | jermar | 98 | |
| 99 | __asm__ volatile ("mov %0 = ar.rsc\n" : "=r" (rsc.value)); |
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| 100 | rsc.loadrs = 0; |
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| 101 | rsc.be = false; |
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| 102 | rsc.pl = PL_USER; |
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| 103 | rsc.mode = 3; /* eager mode */ |
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| 104 | |||
| 1078 | jermar | 105 | switch_to_userspace((__address) kernel_uarg->uspace_entry, |
| 106 | ((__address) kernel_uarg->uspace_stack)+PAGE_SIZE-ALIGN_UP(STACK_ITEM_SIZE, STACK_ALIGNMENT), |
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| 1168 | vana | 107 | ((__address) kernel_uarg->uspace_stack)+PAGE_SIZE, |
| 1078 | jermar | 108 | (__address) kernel_uarg->uspace_uarg, |
| 109 | psr.value, rsc.value); |
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| 919 | jermar | 110 | |
| 111 | while (1) { |
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| 112 | ; |
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| 113 | } |
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| 114 | } |
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| 1121 | jermar | 115 | |
| 116 | /** Set thread-local-storage pointer. |
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| 117 | * |
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| 118 | * We use r13 (a.k.a. tp) for this purpose. |
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| 119 | */ |
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| 120 | __native sys_tls_set(__native addr) |
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| 121 | { |
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| 122 | return 0; |
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| 123 | } |
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| 1474 | palkovsky | 124 | |
| 125 | /** Acquire console back for kernel |
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| 126 | * |
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| 127 | */ |
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| 128 | void arch_grab_console(void) |
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| 129 | { |
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| 130 | } |
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| 131 | /** Return console to userspace |
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| 132 | * |
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| 133 | */ |
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| 134 | void arch_release_console(void) |
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| 135 | { |
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| 136 | } |