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| 1 | jermar | 1 | /* |
| 2 | * Copyright (C) 2001-2004 Jakub Jermar |
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| 3 | * All rights reserved. |
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| 4 | * |
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| 5 | * Redistribution and use in source and binary forms, with or without |
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| 6 | * modification, are permitted provided that the following conditions |
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| 7 | * are met: |
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| 8 | * |
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| 9 | * - Redistributions of source code must retain the above copyright |
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| 10 | * notice, this list of conditions and the following disclaimer. |
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| 11 | * - Redistributions in binary form must reproduce the above copyright |
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| 12 | * notice, this list of conditions and the following disclaimer in the |
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| 13 | * documentation and/or other materials provided with the distribution. |
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| 14 | * - The name of the author may not be used to endorse or promote products |
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| 15 | * derived from this software without specific prior written permission. |
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| 16 | * |
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| 17 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
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| 18 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
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| 19 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
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| 20 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
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| 21 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
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| 22 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
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| 23 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
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| 24 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
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| 25 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
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| 26 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
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| 27 | */ |
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| 28 | |||
| 11 | jermar | 29 | #ifndef __ia32_ATOMIC_H__ |
| 30 | #define __ia32_ATOMIC_H__ |
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| 1 | jermar | 31 | |
| 32 | #include <arch/types.h> |
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| 1100 | palkovsky | 33 | #include <arch/barrier.h> |
| 34 | #include <preemption.h> |
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| 1 | jermar | 35 | |
| 633 | palkovsky | 36 | typedef struct { volatile __u32 count; } atomic_t; |
| 475 | jermar | 37 | |
| 633 | palkovsky | 38 | static inline void atomic_set(atomic_t *val, __u32 i) |
| 625 | palkovsky | 39 | { |
| 40 | val->count = i; |
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| 41 | } |
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| 42 | |||
| 633 | palkovsky | 43 | static inline __u32 atomic_get(atomic_t *val) |
| 625 | palkovsky | 44 | { |
| 45 | return val->count; |
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| 46 | } |
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| 47 | |||
| 475 | jermar | 48 | static inline void atomic_inc(atomic_t *val) { |
| 458 | decky | 49 | #ifdef CONFIG_SMP |
| 625 | palkovsky | 50 | __asm__ volatile ("lock incl %0\n" : "=m" (val->count)); |
| 115 | jermar | 51 | #else |
| 625 | palkovsky | 52 | __asm__ volatile ("incl %0\n" : "=m" (val->count)); |
| 458 | decky | 53 | #endif /* CONFIG_SMP */ |
| 115 | jermar | 54 | } |
| 1 | jermar | 55 | |
| 475 | jermar | 56 | static inline void atomic_dec(atomic_t *val) { |
| 458 | decky | 57 | #ifdef CONFIG_SMP |
| 625 | palkovsky | 58 | __asm__ volatile ("lock decl %0\n" : "=m" (val->count)); |
| 115 | jermar | 59 | #else |
| 625 | palkovsky | 60 | __asm__ volatile ("decl %0\n" : "=m" (val->count)); |
| 458 | decky | 61 | #endif /* CONFIG_SMP */ |
| 115 | jermar | 62 | } |
| 63 | |||
| 1024 | jermar | 64 | static inline count_t atomic_postinc(atomic_t *val) |
| 477 | vana | 65 | { |
| 627 | jermar | 66 | count_t r; |
| 67 | |||
| 477 | vana | 68 | __asm__ volatile ( |
| 557 | jermar | 69 | "movl $1, %0\n" |
| 70 | "lock xaddl %0, %1\n" |
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| 627 | jermar | 71 | : "=r" (r), "=m" (val->count) |
| 477 | vana | 72 | ); |
| 627 | jermar | 73 | |
| 477 | vana | 74 | return r; |
| 75 | } |
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| 76 | |||
| 1024 | jermar | 77 | static inline count_t atomic_postdec(atomic_t *val) |
| 477 | vana | 78 | { |
| 627 | jermar | 79 | count_t r; |
| 80 | |||
| 477 | vana | 81 | __asm__ volatile ( |
| 557 | jermar | 82 | "movl $-1, %0\n" |
| 83 | "lock xaddl %0, %1\n" |
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| 631 | palkovsky | 84 | : "=r" (r), "=m" (val->count) |
| 477 | vana | 85 | ); |
| 627 | jermar | 86 | |
| 477 | vana | 87 | return r; |
| 88 | } |
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| 89 | |||
| 1024 | jermar | 90 | #define atomic_preinc(val) (atomic_postinc(val)+1) |
| 91 | #define atomic_predec(val) (atomic_postdec(val)-1) |
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| 477 | vana | 92 | |
| 633 | palkovsky | 93 | static inline __u32 test_and_set(atomic_t *val) { |
| 94 | __u32 v; |
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| 115 | jermar | 95 | |
| 96 | __asm__ volatile ( |
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| 97 | "movl $1, %0\n" |
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| 259 | palkovsky | 98 | "xchgl %0, %1\n" |
| 625 | palkovsky | 99 | : "=r" (v),"=m" (val->count) |
| 115 | jermar | 100 | ); |
| 101 | |||
| 102 | return v; |
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| 103 | } |
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| 104 | |||
| 1100 | palkovsky | 105 | /** Ia32 specific fast spinlock */ |
| 106 | static inline void atomic_lock_arch(atomic_t *val) |
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| 107 | { |
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| 108 | __u32 tmp; |
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| 115 | jermar | 109 | |
| 1100 | palkovsky | 110 | preemption_disable(); |
| 111 | __asm__ volatile ( |
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| 112 | "0:;" |
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| 113 | #ifdef CONFIG_HT |
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| 114 | "pause;" /* Pentium 4's HT love this instruction */ |
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| 115 | #endif |
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| 116 | "mov %0, %1;" |
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| 117 | "testl %1, %1;" |
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| 118 | "jnz 0b;" /* Leightweight looping on locked spinlock */ |
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| 119 | |||
| 120 | "incl %1;" /* now use the atomic operation */ |
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| 121 | "xchgl %0, %1;" |
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| 122 | "testl %1, %1;" |
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| 123 | "jnz 0b;" |
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| 124 | : "=m"(val->count),"=r"(tmp) |
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| 125 | ); |
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| 126 | /* |
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| 127 | * Prevent critical section code from bleeding out this way up. |
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| 128 | */ |
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| 129 | CS_ENTER_BARRIER(); |
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| 130 | } |
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| 1 | jermar | 131 | |
| 132 | #endif |