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| Rev | Author | Line No. | Line |
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| 633 | palkovsky | 1 | /* |
| 2 | * Copyright (C) 2001-2004 Jakub Jermar |
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| 3 | * All rights reserved. |
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| 4 | * |
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| 5 | * Redistribution and use in source and binary forms, with or without |
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| 6 | * modification, are permitted provided that the following conditions |
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| 7 | * are met: |
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| 8 | * |
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| 9 | * - Redistributions of source code must retain the above copyright |
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| 10 | * notice, this list of conditions and the following disclaimer. |
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| 11 | * - Redistributions in binary form must reproduce the above copyright |
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| 12 | * notice, this list of conditions and the following disclaimer in the |
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| 13 | * documentation and/or other materials provided with the distribution. |
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| 14 | * - The name of the author may not be used to endorse or promote products |
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| 15 | * derived from this software without specific prior written permission. |
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| 16 | * |
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| 17 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
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| 18 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
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| 19 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
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| 20 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
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| 21 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
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| 22 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
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| 23 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
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| 24 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
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| 25 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
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| 26 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
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| 27 | */ |
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| 28 | |||
| 29 | #ifndef __amd64_ATOMIC_H__ |
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| 30 | #define __amd64_ATOMIC_H__ |
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| 31 | |||
| 32 | #include <arch/types.h> |
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| 1100 | palkovsky | 33 | #include <arch/barrier.h> |
| 34 | #include <preemption.h> |
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| 633 | palkovsky | 35 | |
| 36 | typedef struct { volatile __u64 count; } atomic_t; |
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| 37 | |||
| 38 | static inline void atomic_set(atomic_t *val, __u64 i) |
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| 39 | { |
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| 40 | val->count = i; |
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| 41 | } |
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| 42 | |||
| 43 | static inline __u64 atomic_get(atomic_t *val) |
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| 44 | { |
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| 45 | return val->count; |
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| 46 | } |
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| 47 | |||
| 48 | static inline void atomic_inc(atomic_t *val) { |
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| 49 | #ifdef CONFIG_SMP |
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| 50 | __asm__ volatile ("lock incq %0\n" : "=m" (val->count)); |
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| 51 | #else |
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| 52 | __asm__ volatile ("incq %0\n" : "=m" (val->count)); |
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| 53 | #endif /* CONFIG_SMP */ |
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| 54 | } |
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| 55 | |||
| 56 | static inline void atomic_dec(atomic_t *val) { |
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| 57 | #ifdef CONFIG_SMP |
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| 58 | __asm__ volatile ("lock decq %0\n" : "=m" (val->count)); |
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| 59 | #else |
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| 60 | __asm__ volatile ("decq %0\n" : "=m" (val->count)); |
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| 61 | #endif /* CONFIG_SMP */ |
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| 62 | } |
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| 63 | |||
| 1024 | jermar | 64 | static inline count_t atomic_postinc(atomic_t *val) |
| 633 | palkovsky | 65 | { |
| 66 | count_t r; |
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| 67 | |||
| 68 | __asm__ volatile ( |
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| 69 | "movq $1, %0\n" |
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| 70 | "lock xaddq %0, %1\n" |
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| 71 | : "=r" (r), "=m" (val->count) |
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| 72 | ); |
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| 73 | |||
| 74 | return r; |
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| 75 | } |
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| 76 | |||
| 1024 | jermar | 77 | static inline count_t atomic_postdec(atomic_t *val) |
| 633 | palkovsky | 78 | { |
| 79 | count_t r; |
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| 80 | |||
| 81 | __asm__ volatile ( |
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| 82 | "movq $-1, %0\n" |
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| 83 | "lock xaddq %0, %1\n" |
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| 84 | : "=r" (r), "=m" (val->count) |
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| 85 | ); |
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| 86 | |||
| 87 | return r; |
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| 88 | } |
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| 89 | |||
| 1024 | jermar | 90 | #define atomic_preinc(val) (atomic_postinc(val)+1) |
| 91 | #define atomic_predec(val) (atomic_postdec(val)-1) |
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| 633 | palkovsky | 92 | |
| 93 | static inline __u64 test_and_set(atomic_t *val) { |
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| 94 | __u64 v; |
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| 95 | |||
| 96 | __asm__ volatile ( |
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| 97 | "movq $1, %0\n" |
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| 98 | "xchgq %0, %1\n" |
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| 99 | : "=r" (v),"=m" (val->count) |
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| 100 | ); |
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| 101 | |||
| 102 | return v; |
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| 103 | } |
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| 104 | |||
| 105 | |||
| 1100 | palkovsky | 106 | /** AMD64 specific fast spinlock */ |
| 107 | static inline void atomic_lock_arch(atomic_t *val) |
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| 108 | { |
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| 109 | __u64 tmp; |
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| 633 | palkovsky | 110 | |
| 1100 | palkovsky | 111 | preemption_disable(); |
| 112 | __asm__ volatile ( |
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| 113 | "0:;" |
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| 114 | #ifdef CONFIG_HT |
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| 115 | "pause;" /* Pentium 4's HT love this instruction */ |
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| 633 | palkovsky | 116 | #endif |
| 1100 | palkovsky | 117 | "mov %0, %1;" |
| 118 | "testq %1, %1;" |
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| 119 | "jnz 0b;" /* Leightweight looping on locked spinlock */ |
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| 120 | |||
| 121 | "incq %1;" /* now use the atomic operation */ |
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| 122 | "xchgq %0, %1;" |
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| 123 | "testq %1, %1;" |
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| 124 | "jnz 0b;" |
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| 125 | : "=m"(val->count),"=r"(tmp) |
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| 126 | ); |
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| 127 | /* |
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| 128 | * Prevent critical section code from bleeding out this way up. |
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| 129 | */ |
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| 130 | CS_ENTER_BARRIER(); |
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| 131 | } |
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| 132 | |||
| 133 | #endif |