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/*

 * Copyright (c) 2008 Jiri Svoboda

 * All rights reserved.

 *

 * Redistribution and use in source and binary forms, with or without

 * modification, are permitted provided that the following conditions

 * are met:

 *

 * - Redistributions of source code must retain the above copyright

 *   notice, this list of conditions and the following disclaimer.

 * - Redistributions in binary form must reproduce the above copyright

 *   notice, this list of conditions and the following disclaimer in the

 *   documentation and/or other materials provided with the distribution.

 * - The name of the author may not be used to endorse or promote products

 *   derived from this software without specific prior written permission.

 *

 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR

 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES

 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.

 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,

 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT

 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,

 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY

 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT

 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF

 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

 */

/** @addtogroup debug

 * @{

 */

/** @file

 */

#include <stdio.h>

#include <stdlib.h>

#include <assert.h>

#include <sys/types.h>

#include <errno.h>

#include <udebug.h>

#include "../../../cons.h"

#include "../../../main.h"

#include "../../../breakpoint.h"

#include "../../../include/arch.h"

#include "../../../genarch/idec/idec.h"

#define OPCODE_BREAK        0x0000000d

static istate_t istate;

typedef enum {

    /* Branches (conditional) */

    OP_BCzF,

    OP_BCzFL,

    OP_BCzT,

    OP_BCzTL,

    OP_BEQ,

    OP_BEQL,

    OP_BGEZ,

    OP_BGEZAL,

    OP_BGEZALL,

    OP_BGEZL,

    OP_BGTZ,

    OP_BGTZL,

    OP_BLEZ,

    OP_BLEZL,

    OP_BLTZ,

    OP_BLTZAL,

    OP_BLTZALL,

    OP_BLTZL,

    OP_BNE,

    OP_BNEL,

    /* Jumps (unconditional) */

    OP_J,

    OP_JAL,

    OP_JALR,

    OP_JR

} op_t;

typedef struct {

    uint32_t mask;

    uint32_t value;

    op_t op;

} instr_desc_t;

static instr_desc_t decoding_table[] = {

    { 0xf3ff0000, 0x41000000, OP_BCzF },

    { 0xf3ff0000, 0x41020000, OP_BCzFL },

    { 0xf3ff0000, 0x41010000, OP_BCzT },

    { 0xf3ff0000, 0x41030000, OP_BCzTL },

    { 0xfc000000, 0x10000000, OP_BEQ },

    { 0xfc000000, 0x50000000, OP_BEQL },

    { 0xfc1f0000, 0x04010000, OP_BGEZ },

    { 0xfc1f0000, 0x04110000, OP_BGEZAL },

    { 0xfc1f0000, 0x04130000, OP_BGEZALL },

    { 0xfc1f0000, 0x04030000, OP_BGEZL },

    { 0xfc1f0000, 0x1c000000, OP_BGTZ },

    { 0xfc1f0000, 0x5c000000, OP_BGTZL },

    { 0xfc1f0000, 0x18000000, OP_BLEZ },

    { 0xfc1f0000, 0x58000000, OP_BLEZL },

    { 0xfc1f0000, 0x04000000, OP_BLTZ },

    { 0xfc1f0000, 0x04100000, OP_BLTZAL },

    { 0xfc1f0000, 0x04120000, OP_BLTZALL },

    { 0xfc1f0000, 0x04020000, OP_BLTZL },

    { 0xfc000000, 0x14000000, OP_BNE },

    { 0xfc000000, 0x54000000, OP_BNEL },

    { 0xfc000000, 0x08000000, OP_J },

    { 0xfc000000, 0x0c000000, OP_JAL },

    { 0xfc1f07ff, 0x00000009, OP_JALR },

    { 0xfc1fffff, 0x00000008, OP_JR },

    { 0, 0, -1 }

};

void arch_dthread_initialize(dthread_t *dt)

{

    dt->arch.singlestep = false;

    bstore_initialize(&dt->arch.cur);

    bstore_initialize(&dt->arch.next[0]);

    bstore_initialize(&dt->arch.next[1]);

}

int arch_breakpoint_set(breakpoint_t *b)

{

    return idec_breakpoint_set(b);

}

int arch_breakpoint_remove(breakpoint_t *b)

{

    return idec_breakpoint_remove(b);

}

static int islot_read(uintptr_t addr, uint32_t *instr)

{

    int rc;

    rc = udebug_mem_read(app_phone, instr, addr, sizeof(uint32_t));

    if (rc != EOK) {

        cons_printf("Error reading memory address 0x%zx\n", addr);

    }

    return rc;

}

static op_t instr_decode(uint32_t instr)

{

    instr_desc_t *idesc;

    idesc = &decoding_table[0];

    while (idesc->op >= 0) {

        if ((instr & idesc->mask) == idesc->value)

            return idesc->op;

        ++idesc;

    }

    return -1;

}

static int get_reg(dthread_t *dt, int reg_no, uint32_t *value)

{

    int rc;

    cons_printf("get_reg...\n");

    if (reg_no == 0) {

        *value = 0;

        return 0;

    }

    rc = udebug_regs_read(app_phone, dt->hash, &istate);

    if (rc < 0) return rc;

    /* FIXME: ugly */

    *value = ((uint32_t *)&istate)[reg_no - 1];

    printf("get_reg ok (0x%08x)\n", *value);

    return 0;

}

/** Get address of the instruction that will be executed after the current one.

 *

 * Assumptions: addr == PC, *addr is not covered by a BREAK.

 *

 * @param dt        Dthread on which to operate.

 * @param addr      Address of an instruction.

 * @param buffer    Buffer for storing up to 2 addresses.

 * @return      Number of stored addresses or negative error code.

 */

int get_next_addr(dthread_t *dt, uintptr_t addr, uintptr_t *buffer)

{

    /* TODO: J[AL]R, branches and delay slots */

    uint32_t instr;

    int32_t offset;

    op_t op;

    int rc;

    int n;

    rc = islot_read(addr, &instr);

    if (rc != 0) return rc;

    op = instr_decode(instr);

    switch (op) {

    case OP_BCzF:

    case OP_BCzFL:

    case OP_BCzT:

    case OP_BCzTL:

    case OP_BEQ:

    case OP_BEQL:

    case OP_BGEZ:

    case OP_BGEZAL:

    case OP_BGEZALL:

    case OP_BGEZL:

    case OP_BGTZ:

    case OP_BGTZL:

    case OP_BLEZ:

    case OP_BLTZ:

    case OP_BLTZAL:

    case OP_BLTZALL:

    case OP_BLTZL:

    case OP_BNE:

    case OP_BNEL:

        /* Branch */

        offset = (int32_t)(int16_t)(instr & 0x0000ffff) << 2;

        buffer[0] = (addr + 4) + offset;    /* taken */

        buffer[1] = addr + 8;           /* not taken */

        n = 2;

        break;

    case OP_J:

    case OP_JAL:

        /* Immediate jump */

        buffer[0] =

            ((addr + 4) & 0xf0000000) |

            ((instr & 0x03ffffff) << 2);

        n = 1;

        break;

    case OP_JR:

    case OP_JALR:

        /* Register jump */

        rc = get_reg(dt, (instr >> 21) & 0x1f, &buffer[0]);

        n = 1;

        break;

    default:

        /* Regular instruction */  

        buffer[0] = addr + 4;

        n = 1;

        break;

    }

    return n;

}

void arch_event_breakpoint(thash_t thread_hash)

{

    idec_event_breakpoint(thread_hash);

}

void arch_event_trap(dthread_t *dt)

{

    /* Unused */

    (void)dt;

}

void arch_dump_regs(thash_t thash)

{

    /* TODO */

}

void arch_singlestep(dthread_t *dt)

{

    idec_singlestep(dt);

}

/** @}

 */