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1 jermar 1
/*
2071 jermar 2
 * Copyright (c) 2001-2004 Jakub Jermar
1 jermar 3
 * All rights reserved.
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 *
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 * Redistribution and use in source and binary forms, with or without
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 * modification, are permitted provided that the following conditions
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 * are met:
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 *
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 * - Redistributions of source code must retain the above copyright
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 *   notice, this list of conditions and the following disclaimer.
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 * - Redistributions in binary form must reproduce the above copyright
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 *   notice, this list of conditions and the following disclaimer in the
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 *   documentation and/or other materials provided with the distribution.
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 * - The name of the author may not be used to endorse or promote products
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 *   derived from this software without specific prior written permission.
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 *
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 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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 */
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4377 svoboda 29
/** @addtogroup ia32
1702 cejka 30
 * @{
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 */
1754 jermar 32
/**
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 * @file
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 * @brief i8254 chip driver.
1754 jermar 35
 *
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 * Low level time functions.
1702 cejka 37
 */
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1 jermar 39
#include <arch/types.h>
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#include <time/clock.h>
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#include <time/delay.h>
2018 decky 42
#include <arch/cycle.h>
1 jermar 43
#include <arch/interrupt.h>
1477 decky 44
#include <arch/drivers/i8259.h>
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#include <arch/drivers/i8254.h>
1 jermar 46
#include <cpu.h>
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#include <config.h>
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#include <arch/pm.h>
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#include <arch/asm.h>
195 vana 50
#include <arch/cpuid.h>
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#include <arch.h>
195 vana 52
#include <time/delay.h>
1956 decky 53
#include <ddi/irq.h>
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#include <ddi/device.h>
1 jermar 55
 
4377 svoboda 56
#define CLK_PORT1	((ioport8_t *)0x40)
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#define CLK_PORT4	((ioport8_t *)0x43)
1 jermar 58
 
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#define CLK_CONST	1193180
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#define MAGIC_NUMBER	1194
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1956 decky 62
static irq_t i8254_irq;
576 palkovsky 63
 
4377 svoboda 64
static irq_ownership_t i8254_claim(irq_t *irq)
1956 decky 65
{
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	return IRQ_ACCEPT;
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}
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4377 svoboda 69
static void i8254_irq_handler(irq_t *irq)
1956 decky 70
{
2107 jermar 71
	/*
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	 * This IRQ is responsible for kernel preemption.
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	 * Nevertheless, we are now holding a spinlock which prevents
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	 * preemption. For this particular IRQ, we don't need the
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	 * lock. We just release it, call clock() and then reacquire it again.
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	 */
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	spinlock_unlock(&irq->lock);
1956 decky 78
	clock();
2107 jermar 79
	spinlock_lock(&irq->lock);
1956 decky 80
}
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1 jermar 82
void i8254_init(void)
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{
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	irq_initialize(&i8254_irq);
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	i8254_irq.preack = true;
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	i8254_irq.devno = device_assign_devno();
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	i8254_irq.inr = IRQ_CLK;
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	i8254_irq.claim = i8254_claim;
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	i8254_irq.handler = i8254_irq_handler;
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	irq_register(&i8254_irq);
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1 jermar 92
	i8254_normal_operation();
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}
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void i8254_normal_operation(void)
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{
4377 svoboda 97
	pio_write_8(CLK_PORT4, 0x36);
1956 decky 98
	pic_disable_irqs(1 << IRQ_CLK);
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	pio_write_8(CLK_PORT1, (CLK_CONST / HZ) & 0xf);
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	pio_write_8(CLK_PORT1, (CLK_CONST / HZ) >> 8);
1956 decky 101
	pic_enable_irqs(1 << IRQ_CLK);
1 jermar 102
}
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104
#define LOOPS 150000
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#define SHIFT 11
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void i8254_calibrate_delay_loop(void)
107
{
1780 jermar 108
	uint64_t clk1, clk2;
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	uint32_t t1, t2, o1, o2;
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	uint8_t not_ok;
1 jermar 111
 
112
 
113
	/*
114
	 * One-shot timer. Count-down from 0xffff at 1193180Hz
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	 * MAGIC_NUMBER is the magic value for 1ms.
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	 */
4377 svoboda 117
	pio_write_8(CLK_PORT4, 0x30);
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	pio_write_8(CLK_PORT1, 0xff);
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	pio_write_8(CLK_PORT1, 0xff);
1 jermar 120
 
121
	do {
125 jermar 122
		/* will read both status and count */
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		pio_write_8(CLK_PORT4, 0xc2);
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		not_ok = (uint8_t) ((pio_read_8(CLK_PORT1) >> 6) & 1);
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		t1 = pio_read_8(CLK_PORT1);
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		t1 |= pio_read_8(CLK_PORT1) << 8;
1 jermar 127
	} while (not_ok);
128
 
129
	asm_delay_loop(LOOPS);
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4377 svoboda 131
	pio_write_8(CLK_PORT4, 0xd2);
132
	t2 = pio_read_8(CLK_PORT1);
133
	t2 |= pio_read_8(CLK_PORT1) << 8;
1 jermar 134
 
135
	/*
136
	 * We want to determine the overhead of the calibrating mechanism.
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	 */
4377 svoboda 138
	pio_write_8(CLK_PORT4, 0xd2);
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	o1 = pio_read_8(CLK_PORT1);
140
	o1 |= pio_read_8(CLK_PORT1) << 8;
1 jermar 141
 
142
	asm_fake_loop(LOOPS);
143
 
4377 svoboda 144
	pio_write_8(CLK_PORT4, 0xd2);
145
	o2 = pio_read_8(CLK_PORT1);
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	o2 |= pio_read_8(CLK_PORT1) << 8;
1 jermar 147
 
2107 jermar 148
	CPU->delay_loop_const =
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	    ((MAGIC_NUMBER * LOOPS) / 1000) / ((t1 - t2) - (o1 - o2)) +
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	    (((MAGIC_NUMBER * LOOPS) / 1000) % ((t1 - t2) - (o1 - o2)) ? 1 : 0);
1 jermar 151
 
2018 decky 152
	clk1 = get_cycle();
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	delay(1 << SHIFT);
154
	clk2 = get_cycle();
1 jermar 155
 
2018 decky 156
	CPU->frequency_mhz = (clk2 - clk1) >> SHIFT;
1 jermar 157
 
158
	return;
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}
160
 
1754 jermar 161
/** @}
1702 cejka 162
 */