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| Rev | Author | Line No. | Line |
|---|---|---|---|
| 3743 | rimsky | 1 | /* |
| 2 | * Copyright (c) 2006 Jakub Jermar |
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| 3 | * Copyright (c) 2008 Pavel Rimsky |
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| 4 | * All rights reserved. |
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| 5 | * |
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| 6 | * Redistribution and use in source and binary forms, with or without |
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| 7 | * modification, are permitted provided that the following conditions |
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| 8 | * are met: |
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| 9 | * |
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| 10 | * - Redistributions of source code must retain the above copyright |
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| 11 | * notice, this list of conditions and the following disclaimer. |
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| 12 | * - Redistributions in binary form must reproduce the above copyright |
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| 13 | * notice, this list of conditions and the following disclaimer in the |
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| 14 | * documentation and/or other materials provided with the distribution. |
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| 15 | * - The name of the author may not be used to endorse or promote products |
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| 16 | * derived from this software without specific prior written permission. |
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| 17 | * |
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| 18 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
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| 19 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
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| 20 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
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| 21 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
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| 22 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
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| 23 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
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| 24 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
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| 25 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
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| 26 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
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| 27 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
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| 28 | */ |
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| 29 | |||
| 30 | /** @addtogroup sparc64interrupt |
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| 31 | * @{ |
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| 32 | */ |
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| 33 | /** |
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| 34 | * @file |
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| 35 | * @brief This file contains fast MMU trap handlers. |
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| 36 | */ |
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| 37 | |||
| 38 | #ifndef KERN_sparc64_sun4v_MMU_TRAP_H_ |
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| 39 | #define KERN_sparc64_sun4v_MMU_TRAP_H_ |
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| 40 | |||
| 41 | #include <arch/stack.h> |
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| 3862 | rimsky | 42 | #include <arch/regdef.h> |
| 43 | #include <arch/arch.h> |
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| 3835 | rimsky | 44 | #include <arch/sun4v/hypercall.h> |
| 3862 | rimsky | 45 | #include <arch/mm/tlb.h> |
| 46 | #include <arch/mm/mmu.h> |
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| 47 | #include <arch/mm/tte.h> |
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| 3743 | rimsky | 48 | #include <arch/trap/regwin.h> |
| 49 | |||
| 50 | #ifdef CONFIG_TSB |
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| 51 | #include <arch/mm/tsb.h> |
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| 52 | #endif |
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| 53 | |||
| 54 | #define TT_FAST_INSTRUCTION_ACCESS_MMU_MISS 0x64 |
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| 55 | #define TT_FAST_DATA_ACCESS_MMU_MISS 0x68 |
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| 56 | #define TT_FAST_DATA_ACCESS_PROTECTION 0x6c |
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| 4638 | rimsky | 57 | #define TT_CPU_MONDO 0x7c |
| 3743 | rimsky | 58 | |
| 59 | #define FAST_MMU_HANDLER_SIZE 128 |
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| 60 | |||
| 61 | #ifdef __ASM__ |
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| 62 | |||
| 3835 | rimsky | 63 | /* MMU fault status area data fault offset */ |
| 64 | #define FSA_DFA_OFFSET 0x48 |
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| 65 | |||
| 66 | /* MMU fault status area data context */ |
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| 67 | #define FSA_DFC_OFFSET 0x50 |
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| 68 | |||
| 69 | /* offset of the target address within the TTE Data entry */ |
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| 70 | #define TTE_DATA_TADDR_OFFSET 13 |
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| 71 | |||
| 3743 | rimsky | 72 | .macro FAST_INSTRUCTION_ACCESS_MMU_MISS_HANDLER |
| 3863 | rimsky | 73 | PREEMPTIBLE_HANDLER fast_instruction_access_mmu_miss |
| 3743 | rimsky | 74 | .endm |
| 75 | |||
| 76 | /* |
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| 3835 | rimsky | 77 | * Handler of the Fast Data Access MMU Miss trap. If the trap occurred in the kernel |
| 78 | * (context 0), an identity mapping (with displacement) is installed. Otherwise |
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| 79 | * a higher level service routine is called. |
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| 3743 | rimsky | 80 | */ |
| 81 | .macro FAST_DATA_ACCESS_MMU_MISS_HANDLER tl |
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| 3835 | rimsky | 82 | |
| 83 | mov SCRATCHPAD_MMU_FSA, %g1 |
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| 84 | ldxa [%g1] ASI_SCRATCHPAD, %g1 ! g1 <= RA of MMU fault status area |
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| 85 | |||
| 3993 | rimsky | 86 | /* read faulting context */ |
| 3835 | rimsky | 87 | add %g1, FSA_DFC_OFFSET, %g2 ! g2 <= RA of data fault context |
| 88 | ldxa [%g2] ASI_REAL, %g3 ! read the fault context |
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| 89 | |||
| 90 | /* read the faulting address */ |
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| 91 | add %g1, FSA_DFA_OFFSET, %g2 ! g2 <= RA of data fault address |
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| 92 | ldxa [%g2] ASI_REAL, %g1 ! read the fault address |
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| 93 | srlx %g1, TTE_DATA_TADDR_OFFSET, %g1 ! truncate it to page boundary |
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| 94 | sllx %g1, TTE_DATA_TADDR_OFFSET, %g1 |
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| 95 | |||
| 3993 | rimsky | 96 | /* service by higher-level routine when context != 0 */ |
| 97 | brnz %g3, 0f |
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| 98 | nop |
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| 99 | |||
| 3835 | rimsky | 100 | /* exclude page number 0 from installing the identity mapping */ |
| 101 | brz %g1, 0f |
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| 102 | nop |
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| 103 | |||
| 3993 | rimsky | 104 | /* |
| 105 | * Installing the identity does not fit into 32 instructions, call |
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| 106 | * a separate routine. The routine performs RETRY, hence the call never |
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| 107 | * returns. |
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| 108 | */ |
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| 3835 | rimsky | 109 | ba install_identity_mapping |
| 110 | nop |
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| 111 | |||
| 3993 | rimsky | 112 | 0: |
| 3835 | rimsky | 113 | |
| 3993 | rimsky | 114 | /* |
| 115 | * One of the scenarios in which this trap can occur is when the |
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| 116 | * register window spill/fill handler accesses a memory which is not |
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| 117 | * mapped. In such a case, this handler will be called from TL = 1. |
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| 118 | * We handle the situation by pretending that the MMU miss occurred |
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| 119 | * on TL = 0. Once the MMU miss trap is services, the instruction which |
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| 120 | * caused the spill/fill trap is restarted, the spill/fill trap occurs, |
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| 121 | * but this time its handler accesse memory which IS mapped. |
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| 122 | */ |
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| 123 | .if (\tl > 0) |
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| 124 | wrpr %g0, 1, %tl |
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| 125 | .endif |
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| 126 | |||
| 127 | /* |
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| 128 | * Save the faulting virtual page and faulting context to the %g2 |
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| 129 | * register. The most significant 51 bits of the %g2 register will |
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| 130 | * contain the virtual address which caused the fault truncated to the |
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| 131 | * page boundary. The least significant 13 bits of the %g2 register |
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| 132 | * will contain the number of the context in which the fault occurred. |
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| 133 | * The value of the %g2 register will be passed as a parameter to the |
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| 134 | * higher level service routine. |
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| 135 | */ |
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| 136 | or %g1, %g3, %g2 |
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| 137 | |||
| 138 | PREEMPTIBLE_HANDLER fast_data_access_mmu_miss |
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| 3743 | rimsky | 139 | .endm |
| 140 | |||
| 3993 | rimsky | 141 | /* |
| 142 | * Handler of the Fast Data MMU Protection trap. Finds the trapping address |
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| 143 | * and context and calls higher level service routine. |
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| 144 | */ |
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| 3743 | rimsky | 145 | .macro FAST_DATA_ACCESS_PROTECTION_HANDLER tl |
| 3993 | rimsky | 146 | /* |
| 147 | * The same special case as in FAST_DATA_ACCESS_MMU_MISS_HANDLER. |
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| 148 | */ |
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| 149 | .if (\tl > 0) |
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| 150 | wrpr %g0, 1, %tl |
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| 151 | .endif |
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| 152 | |||
| 153 | mov SCRATCHPAD_MMU_FSA, %g1 |
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| 154 | ldxa [%g1] ASI_SCRATCHPAD, %g1 ! g1 <= RA of MMU fault status area |
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| 155 | |||
| 156 | /* read faulting context */ |
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| 157 | add %g1, FSA_DFC_OFFSET, %g2 ! g2 <= RA of data fault context |
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| 158 | ldxa [%g2] ASI_REAL, %g3 ! read the fault context |
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| 159 | |||
| 160 | /* read the faulting address */ |
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| 161 | add %g1, FSA_DFA_OFFSET, %g2 ! g2 <= RA of data fault address |
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| 162 | ldxa [%g2] ASI_REAL, %g1 ! read the fault address |
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| 163 | srlx %g1, TTE_DATA_TADDR_OFFSET, %g1 ! truncate it to page boundary |
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| 164 | sllx %g1, TTE_DATA_TADDR_OFFSET, %g1 |
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| 165 | |||
| 166 | /* the same as for FAST_DATA_ACCESS_MMU_MISS_HANDLER */ |
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| 167 | or %g1, %g3, %g2 |
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| 168 | |||
| 169 | PREEMPTIBLE_HANDLER fast_data_access_protection |
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| 3743 | rimsky | 170 | .endm |
| 171 | |||
| 172 | #endif /* __ASM__ */ |
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| 173 | |||
| 174 | #endif |
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| 175 | |||
| 176 | /** @} |
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| 177 | */ |