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| Rev | Author | Line No. | Line |
|---|---|---|---|
| 4130 | rimsky | 1 | /* |
| 2 | * Copyright (c) 2005 Jakub Jermar |
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| 3 | * All rights reserved. |
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| 4 | * |
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| 5 | * Redistribution and use in source and binary forms, with or without |
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| 6 | * modification, are permitted provided that the following conditions |
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| 7 | * are met: |
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| 8 | * |
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| 9 | * - Redistributions of source code must retain the above copyright |
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| 10 | * notice, this list of conditions and the following disclaimer. |
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| 11 | * - Redistributions in binary form must reproduce the above copyright |
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| 12 | * notice, this list of conditions and the following disclaimer in the |
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| 13 | * documentation and/or other materials provided with the distribution. |
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| 14 | * - The name of the author may not be used to endorse or promote products |
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| 15 | * derived from this software without specific prior written permission. |
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| 16 | * |
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| 17 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
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| 18 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
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| 19 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
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| 20 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
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| 21 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
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| 22 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
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| 23 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
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| 24 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
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| 25 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
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| 26 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
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| 27 | */ |
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| 28 | |||
| 29 | /** @addtogroup sparc64 |
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| 30 | * @{ |
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| 31 | */ |
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| 32 | /** @file |
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| 33 | */ |
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| 34 | |||
| 35 | #ifndef KERN_sparc64_sun4u_REGISTER_H_ |
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| 36 | #define KERN_sparc64_sun4u_REGISTER_H_ |
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| 37 | |||
| 38 | #include <arch/regdef.h> |
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| 39 | #include <arch/types.h> |
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| 40 | |||
| 41 | /** Version Register. */ |
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| 42 | union ver_reg { |
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| 43 | uint64_t value; |
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| 44 | struct { |
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| 45 | uint16_t manuf; /**< Manufacturer code. */ |
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| 46 | uint16_t impl; /**< Implementation code. */ |
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| 47 | uint8_t mask; /**< Mask set revision. */ |
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| 48 | unsigned : 8; |
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| 49 | uint8_t maxtl; |
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| 50 | unsigned : 3; |
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| 51 | unsigned maxwin : 5; |
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| 52 | } __attribute__ ((packed)); |
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| 53 | }; |
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| 54 | typedef union ver_reg ver_reg_t; |
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| 55 | |||
| 56 | /** Processor State Register. */ |
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| 57 | union pstate_reg { |
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| 58 | uint64_t value; |
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| 59 | struct { |
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| 60 | uint64_t : 52; |
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| 61 | unsigned ig : 1; /**< Interrupt Globals. */ |
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| 62 | unsigned mg : 1; /**< MMU Globals. */ |
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| 63 | unsigned cle : 1; /**< Current Little Endian. */ |
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| 64 | unsigned tle : 1; /**< Trap Little Endian. */ |
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| 65 | unsigned mm : 2; /**< Memory Model. */ |
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| 66 | unsigned red : 1; /**< RED state. */ |
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| 67 | unsigned pef : 1; /**< Enable floating-point. */ |
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| 68 | unsigned am : 1; /**< 32-bit Address Mask. */ |
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| 69 | unsigned priv : 1; /**< Privileged Mode. */ |
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| 70 | unsigned ie : 1; /**< Interrupt Enable. */ |
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| 71 | unsigned ag : 1; /**< Alternate Globals*/ |
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| 72 | } __attribute__ ((packed)); |
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| 73 | }; |
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| 74 | typedef union pstate_reg pstate_reg_t; |
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| 75 | |||
| 76 | #endif |
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| 77 | |||
| 78 | /** @} |
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| 79 | */ |