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| Rev | Author | Line No. | Line |
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| 1 | jermar | 1 | /* |
| 2071 | jermar | 2 | * Copyright (c) 2001-2004 Jakub Jermar |
| 1 | jermar | 3 | * All rights reserved. |
| 4 | * |
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| 5 | * Redistribution and use in source and binary forms, with or without |
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| 6 | * modification, are permitted provided that the following conditions |
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| 7 | * are met: |
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| 8 | * |
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| 9 | * - Redistributions of source code must retain the above copyright |
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| 10 | * notice, this list of conditions and the following disclaimer. |
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| 11 | * - Redistributions in binary form must reproduce the above copyright |
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| 12 | * notice, this list of conditions and the following disclaimer in the |
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| 13 | * documentation and/or other materials provided with the distribution. |
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| 14 | * - The name of the author may not be used to endorse or promote products |
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| 15 | * derived from this software without specific prior written permission. |
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| 16 | * |
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| 17 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
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| 18 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
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| 19 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
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| 20 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
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| 21 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
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| 22 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
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| 23 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
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| 24 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
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| 25 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
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| 26 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
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| 27 | */ |
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| 28 | |||
| 1731 | jermar | 29 | /** @addtogroup ia32 |
| 1702 | cejka | 30 | * @{ |
| 31 | */ |
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| 32 | /** @file |
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| 33 | */ |
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| 34 | |||
| 1888 | jermar | 35 | #ifndef KERN_ia32_CPUID_H_ |
| 36 | #define KERN_ia32_CPUID_H_ |
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| 1 | jermar | 37 | |
| 4263 | mejdrech | 38 | #define INTEL_CPUID_LEVEL 0x00000000 |
| 39 | #define INTEL_CPUID_STANDARD 0x00000001 |
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| 40 | #define INTEL_PSE 3 |
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| 41 | #define INTEL_SEP 11 |
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| 42 | |||
| 43 | #ifndef __ASM__ |
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| 44 | |||
| 1 | jermar | 45 | #include <arch/types.h> |
| 46 | |||
| 2079 | decky | 47 | typedef struct { |
| 1780 | jermar | 48 | uint32_t cpuid_eax; |
| 49 | uint32_t cpuid_ebx; |
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| 50 | uint32_t cpuid_ecx; |
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| 51 | uint32_t cpuid_edx; |
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| 2079 | decky | 52 | } __attribute__ ((packed)) cpu_info_t; |
| 1 | jermar | 53 | |
| 1019 | vana | 54 | struct __cpuid_extended_feature_info { |
| 55 | unsigned sse3 : 1; |
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| 56 | unsigned : 31; |
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| 57 | } __attribute__ ((packed)); |
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| 58 | |||
| 2317 | decky | 59 | typedef union cpuid_extended_feature_info { |
| 1019 | vana | 60 | struct __cpuid_extended_feature_info bits; |
| 2317 | decky | 61 | uint32_t word; |
| 62 | } cpuid_extended_feature_info; |
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| 1019 | vana | 63 | |
| 64 | struct __cpuid_feature_info { |
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| 65 | unsigned : 23; |
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| 66 | unsigned mmx : 1; |
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| 67 | unsigned fxsr : 1; |
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| 68 | unsigned sse : 1; |
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| 69 | unsigned sse2 : 1; |
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| 70 | unsigned : 5; |
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| 71 | } __attribute__ ((packed)); |
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| 72 | |||
| 2317 | decky | 73 | typedef union cpuid_feature_info { |
| 1019 | vana | 74 | struct __cpuid_feature_info bits; |
| 2317 | decky | 75 | uint32_t word; |
| 76 | } cpuid_feature_info; |
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| 1019 | vana | 77 | |
| 78 | |||
| 1780 | jermar | 79 | static inline uint32_t has_cpuid(void) |
| 408 | decky | 80 | { |
| 1780 | jermar | 81 | uint32_t val, ret; |
| 408 | decky | 82 | |
| 2082 | decky | 83 | asm volatile ( |
| 4153 | mejdrech | 84 | "pushf\n" /* read flags */ |
| 85 | "popl %[ret]\n" |
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| 86 | "movl %[ret], %[val]\n" |
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| 408 | decky | 87 | |
| 4153 | mejdrech | 88 | "btcl $21, %[val]\n" /* swap the ID bit */ |
| 408 | decky | 89 | |
| 4153 | mejdrech | 90 | "pushl %[val]\n" /* propagate the change into flags */ |
| 408 | decky | 91 | "popf\n" |
| 92 | "pushf\n" |
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| 4153 | mejdrech | 93 | "popl %[val]\n" |
| 408 | decky | 94 | |
| 4153 | mejdrech | 95 | "andl $(1 << 21), %[ret]\n" /* interrested only in ID bit */ |
| 96 | "andl $(1 << 21), %[val]\n" |
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| 97 | "xorl %[val], %[ret]\n" |
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| 98 | : [ret] "=r" (ret), [val] "=r" (val) |
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| 408 | decky | 99 | ); |
| 100 | |||
| 101 | return ret; |
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| 102 | } |
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| 1 | jermar | 103 | |
| 2079 | decky | 104 | static inline void cpuid(uint32_t cmd, cpu_info_t *info) |
| 348 | jermar | 105 | { |
| 2082 | decky | 106 | asm volatile ( |
| 408 | decky | 107 | "cpuid\n" |
| 4153 | mejdrech | 108 | : "=a" (info->cpuid_eax), "=b" (info->cpuid_ebx), |
| 109 | "=c" (info->cpuid_ecx), "=d" (info->cpuid_edx) |
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| 2317 | decky | 110 | : "a" (cmd) |
| 408 | decky | 111 | ); |
| 348 | jermar | 112 | } |
| 1 | jermar | 113 | |
| 4263 | mejdrech | 114 | #endif /* !def __ASM__ */ |
| 1 | jermar | 115 | #endif |
| 1702 | cejka | 116 | |
| 1731 | jermar | 117 | /** @} |
| 1702 | cejka | 118 | */ |