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Rev | Author | Line No. | Line |
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418 | jermar | 1 | /* |
2071 | jermar | 2 | * Copyright (c) 2005 Jakub Jermar |
418 | jermar | 3 | * All rights reserved. |
4 | * |
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5 | * Redistribution and use in source and binary forms, with or without |
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6 | * modification, are permitted provided that the following conditions |
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7 | * are met: |
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8 | * |
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9 | * - Redistributions of source code must retain the above copyright |
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10 | * notice, this list of conditions and the following disclaimer. |
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11 | * - Redistributions in binary form must reproduce the above copyright |
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12 | * notice, this list of conditions and the following disclaimer in the |
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13 | * documentation and/or other materials provided with the distribution. |
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14 | * - The name of the author may not be used to endorse or promote products |
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15 | * derived from this software without specific prior written permission. |
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16 | * |
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17 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
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18 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
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19 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
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20 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
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21 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
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22 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
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23 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
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24 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
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25 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
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26 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
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27 | */ |
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28 | |||
1731 | jermar | 29 | /** @addtogroup sparc64 |
1702 | cejka | 30 | * @{ |
31 | */ |
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32 | /** @file |
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33 | */ |
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34 | |||
1860 | jermar | 35 | #ifndef KERN_sparc64_CPU_H_ |
36 | #define KERN_sparc64_CPU_H_ |
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418 | jermar | 37 | |
640 | jermar | 38 | #define MANUF_FUJITSU 0x04 |
39 | #define MANUF_ULTRASPARC 0x17 /**< UltraSPARC I, UltraSPARC II */ |
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40 | #define MANUF_SUN 0x3e |
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41 | |||
42 | #define IMPL_ULTRASPARCI 0x10 |
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43 | #define IMPL_ULTRASPARCII 0x11 |
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44 | #define IMPL_ULTRASPARCII_I 0x12 |
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45 | #define IMPL_ULTRASPARCII_E 0x13 |
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4055 | trochtova | 46 | #define IMPL_ULTRASPARCIII 0x14 |
47 | #define IMPL_ULTRASPARCIII_PLUS 0x15 |
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48 | #define IMPL_ULTRASPARCIII_I 0x16 |
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49 | #define IMPL_ULTRASPARCIV 0x18 |
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640 | jermar | 50 | #define IMPL_ULTRASPARCIV_PLUS 0x19 |
51 | |||
52 | #define IMPL_SPARC64V 0x5 |
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53 | |||
4055 | trochtova | 54 | #ifndef __ASM__ |
55 | |||
56 | #include <arch/types.h> |
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57 | #include <typedefs.h> |
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58 | #include <arch/register.h> |
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59 | #include <arch/regdef.h> |
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60 | #include <arch/asm.h> |
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61 | |||
62 | #ifdef CONFIG_SMP |
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63 | #include <arch/mm/cache.h> |
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64 | #endif |
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65 | |||
2079 | decky | 66 | typedef struct { |
2134 | jermar | 67 | uint32_t mid; /**< Processor ID as read from |
4055 | trochtova | 68 | UPA_CONFIG/FIREPLANE_CONFIG. */ |
640 | jermar | 69 | ver_reg_t ver; |
2046 | jermar | 70 | uint32_t clock_frequency; /**< Processor frequency in Hz. */ |
2044 | jermar | 71 | uint64_t next_tick_cmpr; /**< Next clock interrupt should be |
2134 | jermar | 72 | generated when the TICK register |
73 | matches this value. */ |
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2079 | decky | 74 | } cpu_arch_t; |
4055 | trochtova | 75 | |
76 | |||
77 | /** |
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78 | * Reads the module ID (agent ID/CPUID) of the current CPU. |
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79 | */ |
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80 | static inline uint32_t read_mid(void) |
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81 | { |
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82 | uint64_t icbus_config = asi_u64_read(ASI_ICBUS_CONFIG, 0); |
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83 | icbus_config = icbus_config >> ICBUS_CONFIG_MID_SHIFT; |
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84 | #if defined (US) |
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85 | return icbus_config & 0x1f; |
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86 | #elif defined (US3) |
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87 | if (((ver_reg_t) ver_read()).impl == IMPL_ULTRASPARCIII_I) |
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88 | return icbus_config & 0x1f; |
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89 | else |
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90 | return icbus_config & 0x3ff; |
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418 | jermar | 91 | #endif |
4055 | trochtova | 92 | } |
1702 | cejka | 93 | |
4055 | trochtova | 94 | #endif |
95 | |||
96 | #endif |
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97 | |||
1731 | jermar | 98 | /** @} |
1702 | cejka | 99 | */ |