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1 | jermar | 1 | /* |
2071 | jermar | 2 | * Copyright (c) 2001-2004 Jakub Jermar |
1 | jermar | 3 | * All rights reserved. |
4 | * |
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5 | * Redistribution and use in source and binary forms, with or without |
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6 | * modification, are permitted provided that the following conditions |
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7 | * are met: |
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8 | * |
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9 | * - Redistributions of source code must retain the above copyright |
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10 | * notice, this list of conditions and the following disclaimer. |
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11 | * - Redistributions in binary form must reproduce the above copyright |
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12 | * notice, this list of conditions and the following disclaimer in the |
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13 | * documentation and/or other materials provided with the distribution. |
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14 | * - The name of the author may not be used to endorse or promote products |
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15 | * derived from this software without specific prior written permission. |
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16 | * |
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17 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
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18 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
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19 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
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20 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
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21 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
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22 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
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23 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
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24 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
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25 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
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26 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
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27 | */ |
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28 | |||
1754 | jermar | 29 | /** @addtogroup ia32 |
1702 | cejka | 30 | * @{ |
31 | */ |
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1754 | jermar | 32 | /** |
33 | * @file |
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34 | * @brief PIC driver. |
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35 | * |
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36 | * Programmable Interrupt Controller for UP systems based on i8259 chip. |
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1702 | cejka | 37 | */ |
38 | |||
1477 | decky | 39 | #include <arch/drivers/i8259.h> |
1 | jermar | 40 | #include <cpu.h> |
41 | #include <arch/types.h> |
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42 | #include <arch/asm.h> |
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43 | #include <arch.h> |
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195 | vana | 44 | #include <print.h> |
576 | palkovsky | 45 | #include <interrupt.h> |
1 | jermar | 46 | |
958 | jermar | 47 | static void pic_spurious(int n, istate_t *istate); |
576 | palkovsky | 48 | |
1 | jermar | 49 | void i8259_init(void) |
50 | { |
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51 | /* ICW1: this is ICW1, ICW4 to follow */ |
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4055 | trochtova | 52 | pio_write_8(PIC_PIC0PORT1, PIC_ICW1 | PIC_NEEDICW4); |
1 | jermar | 53 | |
54 | /* ICW2: IRQ 0 maps to INT IRQBASE */ |
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4055 | trochtova | 55 | pio_write_8(PIC_PIC0PORT2, IVT_IRQBASE); |
125 | jermar | 56 | |
1 | jermar | 57 | /* ICW3: pic1 using IRQ IRQ_PIC1 */ |
4055 | trochtova | 58 | pio_write_8(PIC_PIC0PORT2, 1 << IRQ_PIC1); |
125 | jermar | 59 | |
60 | /* ICW4: i8086 mode */ |
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4055 | trochtova | 61 | pio_write_8(PIC_PIC0PORT2, 1); |
1 | jermar | 62 | |
63 | /* ICW1: ICW1, ICW4 to follow */ |
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4055 | trochtova | 64 | pio_write_8(PIC_PIC1PORT1, PIC_ICW1 | PIC_NEEDICW4); |
1 | jermar | 65 | |
125 | jermar | 66 | /* ICW2: IRQ 8 maps to INT (IVT_IRQBASE + 8) */ |
4055 | trochtova | 67 | pio_write_8(PIC_PIC1PORT2, IVT_IRQBASE + 8); |
1 | jermar | 68 | |
305 | jermar | 69 | /* ICW3: pic1 is known as IRQ_PIC1 */ |
4055 | trochtova | 70 | pio_write_8(PIC_PIC1PORT2, IRQ_PIC1); |
1 | jermar | 71 | |
125 | jermar | 72 | /* ICW4: i8086 mode */ |
4055 | trochtova | 73 | pio_write_8(PIC_PIC1PORT2, 1); |
1 | jermar | 74 | |
75 | /* |
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76 | * Register interrupt handler for the PIC spurious interrupt. |
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77 | */ |
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958 | jermar | 78 | exc_register(VECTOR_PIC_SPUR, "pic_spurious", (iroutine) pic_spurious); |
1 | jermar | 79 | |
80 | /* |
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81 | * Set the enable/disable IRQs handlers. |
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82 | * Set the End-of-Interrupt handler. |
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83 | */ |
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84 | enable_irqs_function = pic_enable_irqs; |
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85 | disable_irqs_function = pic_disable_irqs; |
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86 | eoi_function = pic_eoi; |
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125 | jermar | 87 | |
1 | jermar | 88 | pic_disable_irqs(0xffff); /* disable all irq's */ |
2107 | jermar | 89 | pic_enable_irqs(1 << IRQ_PIC1); /* but enable pic1 */ |
1 | jermar | 90 | } |
91 | |||
1780 | jermar | 92 | void pic_enable_irqs(uint16_t irqmask) |
1 | jermar | 93 | { |
1780 | jermar | 94 | uint8_t x; |
125 | jermar | 95 | |
1 | jermar | 96 | if (irqmask & 0xff) { |
4055 | trochtova | 97 | x = pio_read_8(PIC_PIC0PORT2); |
98 | pio_write_8(PIC_PIC0PORT2, (uint8_t) (x & (~(irqmask & 0xff)))); |
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1 | jermar | 99 | } |
100 | if (irqmask >> 8) { |
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4055 | trochtova | 101 | x = pio_read_8(PIC_PIC1PORT2); |
102 | pio_write_8(PIC_PIC1PORT2, (uint8_t) (x & (~(irqmask >> 8)))); |
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1 | jermar | 103 | } |
104 | } |
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105 | |||
1780 | jermar | 106 | void pic_disable_irqs(uint16_t irqmask) |
1 | jermar | 107 | { |
1780 | jermar | 108 | uint8_t x; |
125 | jermar | 109 | |
1 | jermar | 110 | if (irqmask & 0xff) { |
4055 | trochtova | 111 | x = pio_read_8(PIC_PIC0PORT2); |
112 | pio_write_8(PIC_PIC0PORT2, (uint8_t) (x | (irqmask & 0xff))); |
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1 | jermar | 113 | } |
114 | if (irqmask >> 8) { |
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4055 | trochtova | 115 | x = pio_read_8(PIC_PIC1PORT2); |
116 | pio_write_8(PIC_PIC1PORT2, (uint8_t) (x | (irqmask >> 8))); |
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1 | jermar | 117 | } |
118 | } |
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119 | |||
120 | void pic_eoi(void) |
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121 | { |
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4055 | trochtova | 122 | pio_write_8((ioport8_t *)0x20, 0x20); |
123 | pio_write_8((ioport8_t *)0xa0, 0x20); |
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1 | jermar | 124 | } |
125 | |||
2439 | decky | 126 | void pic_spurious(int n __attribute__((unused)), istate_t *istate __attribute__((unused))) |
1 | jermar | 127 | { |
1667 | jermar | 128 | #ifdef CONFIG_DEBUG |
2439 | decky | 129 | printf("cpu%u: PIC spurious interrupt\n", CPU->id); |
1667 | jermar | 130 | #endif |
1 | jermar | 131 | } |
1702 | cejka | 132 | |
1754 | jermar | 133 | /** @} |
1702 | cejka | 134 | */ |