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| Rev | Author | Line No. | Line |
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| 633 | palkovsky | 1 | /* |
| 2071 | jermar | 2 | * Copyright (c) 2001-2004 Jakub Jermar |
| 633 | palkovsky | 3 | * All rights reserved. |
| 4 | * |
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| 5 | * Redistribution and use in source and binary forms, with or without |
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| 6 | * modification, are permitted provided that the following conditions |
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| 7 | * are met: |
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| 8 | * |
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| 9 | * - Redistributions of source code must retain the above copyright |
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| 10 | * notice, this list of conditions and the following disclaimer. |
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| 11 | * - Redistributions in binary form must reproduce the above copyright |
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| 12 | * notice, this list of conditions and the following disclaimer in the |
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| 13 | * documentation and/or other materials provided with the distribution. |
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| 14 | * - The name of the author may not be used to endorse or promote products |
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| 15 | * derived from this software without specific prior written permission. |
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| 16 | * |
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| 17 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
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| 18 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
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| 19 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
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| 20 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
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| 21 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
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| 22 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
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| 23 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
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| 24 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
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| 25 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
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| 26 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
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| 27 | */ |
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| 28 | |||
| 4055 | trochtova | 29 | /** @addtogroup amd64 |
| 1702 | cejka | 30 | * @{ |
| 31 | */ |
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| 32 | /** @file |
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| 33 | */ |
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| 34 | |||
| 1888 | jermar | 35 | #ifndef KERN_amd64_ATOMIC_H_ |
| 36 | #define KERN_amd64_ATOMIC_H_ |
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| 633 | palkovsky | 37 | |
| 38 | #include <arch/types.h> |
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| 1100 | palkovsky | 39 | #include <arch/barrier.h> |
| 40 | #include <preemption.h> |
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| 633 | palkovsky | 41 | |
| 42 | static inline void atomic_inc(atomic_t *val) { |
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| 43 | #ifdef CONFIG_SMP |
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| 4055 | trochtova | 44 | asm volatile ( |
| 45 | "lock incq %[count]\n" |
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| 46 | : [count] "+m" (val->count) |
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| 47 | ); |
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| 633 | palkovsky | 48 | #else |
| 4055 | trochtova | 49 | asm volatile ( |
| 50 | "incq %[count]\n" |
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| 51 | : [count] "+m" (val->count) |
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| 52 | ); |
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| 633 | palkovsky | 53 | #endif /* CONFIG_SMP */ |
| 54 | } |
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| 55 | |||
| 56 | static inline void atomic_dec(atomic_t *val) { |
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| 57 | #ifdef CONFIG_SMP |
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| 4055 | trochtova | 58 | asm volatile ( |
| 59 | "lock decq %[count]\n" |
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| 60 | : [count] "+m" (val->count) |
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| 61 | ); |
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| 633 | palkovsky | 62 | #else |
| 4055 | trochtova | 63 | asm volatile ( |
| 64 | "decq %[count]\n" |
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| 65 | : [count] "+m" (val->count) |
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| 66 | ); |
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| 633 | palkovsky | 67 | #endif /* CONFIG_SMP */ |
| 68 | } |
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| 69 | |||
| 1104 | jermar | 70 | static inline long atomic_postinc(atomic_t *val) |
| 633 | palkovsky | 71 | { |
| 1692 | palkovsky | 72 | long r = 1; |
| 4055 | trochtova | 73 | |
| 2082 | decky | 74 | asm volatile ( |
| 4055 | trochtova | 75 | "lock xaddq %[r], %[count]\n" |
| 76 | : [count] "+m" (val->count), [r] "+r" (r) |
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| 633 | palkovsky | 77 | ); |
| 4055 | trochtova | 78 | |
| 633 | palkovsky | 79 | return r; |
| 80 | } |
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| 81 | |||
| 1104 | jermar | 82 | static inline long atomic_postdec(atomic_t *val) |
| 633 | palkovsky | 83 | { |
| 1692 | palkovsky | 84 | long r = -1; |
| 633 | palkovsky | 85 | |
| 2082 | decky | 86 | asm volatile ( |
| 4055 | trochtova | 87 | "lock xaddq %[r], %[count]\n" |
| 88 | : [count] "+m" (val->count), [r] "+r" (r) |
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| 633 | palkovsky | 89 | ); |
| 90 | |||
| 91 | return r; |
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| 92 | } |
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| 93 | |||
| 4055 | trochtova | 94 | #define atomic_preinc(val) (atomic_postinc(val) + 1) |
| 95 | #define atomic_predec(val) (atomic_postdec(val) - 1) |
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| 633 | palkovsky | 96 | |
| 1780 | jermar | 97 | static inline uint64_t test_and_set(atomic_t *val) { |
| 98 | uint64_t v; |
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| 633 | palkovsky | 99 | |
| 2082 | decky | 100 | asm volatile ( |
| 4055 | trochtova | 101 | "movq $1, %[v]\n" |
| 102 | "xchgq %[v], %[count]\n" |
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| 103 | : [v] "=r" (v), [count] "+m" (val->count) |
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| 633 | palkovsky | 104 | ); |
| 105 | |||
| 106 | return v; |
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| 107 | } |
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| 108 | |||
| 109 | |||
| 1104 | jermar | 110 | /** amd64 specific fast spinlock */ |
| 1100 | palkovsky | 111 | static inline void atomic_lock_arch(atomic_t *val) |
| 112 | { |
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| 1780 | jermar | 113 | uint64_t tmp; |
| 4055 | trochtova | 114 | |
| 1100 | palkovsky | 115 | preemption_disable(); |
| 2082 | decky | 116 | asm volatile ( |
| 4055 | trochtova | 117 | "0:\n" |
| 118 | "pause\n" |
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| 119 | "mov %[count], %[tmp]\n" |
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| 120 | "testq %[tmp], %[tmp]\n" |
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| 121 | "jnz 0b\n" /* lightweight looping on locked spinlock */ |
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| 1100 | palkovsky | 122 | |
| 4055 | trochtova | 123 | "incq %[tmp]\n" /* now use the atomic operation */ |
| 124 | "xchgq %[count], %[tmp]\n" |
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| 125 | "testq %[tmp], %[tmp]\n" |
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| 126 | "jnz 0b\n" |
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| 127 | : [count] "+m" (val->count), [tmp] "=&r" (tmp) |
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| 128 | ); |
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| 1100 | palkovsky | 129 | /* |
| 130 | * Prevent critical section code from bleeding out this way up. |
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| 131 | */ |
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| 132 | CS_ENTER_BARRIER(); |
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| 133 | } |
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| 134 | |||
| 135 | #endif |
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| 1702 | cejka | 136 | |
| 1888 | jermar | 137 | /** @} |
| 1702 | cejka | 138 | */ |