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1125 | jermar | 1 | # |
2 | # Copyright (C) 2005 Jakub Jermar |
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3 | # All rights reserved. |
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4 | # |
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5 | # Redistribution and use in source and binary forms, with or without |
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6 | # modification, are permitted provided that the following conditions |
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7 | # are met: |
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8 | # |
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9 | # - Redistributions of source code must retain the above copyright |
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10 | # notice, this list of conditions and the following disclaimer. |
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11 | # - Redistributions in binary form must reproduce the above copyright |
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12 | # notice, this list of conditions and the following disclaimer in the |
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13 | # documentation and/or other materials provided with the distribution. |
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14 | # - The name of the author may not be used to endorse or promote products |
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15 | # derived from this software without specific prior written permission. |
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16 | # |
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17 | # THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
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18 | # IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
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19 | # OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
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20 | # IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
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21 | # INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
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22 | # NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
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23 | # DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
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24 | # THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
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25 | # (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
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26 | # THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
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27 | # |
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28 | |||
29 | .text |
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30 | |||
31 | .global context_save |
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32 | .global context_restore |
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33 | |||
34 | context_save: |
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35 | alloc loc0 = ar.pfs, 1, 8, 0, 0 |
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36 | mov loc1 = ar.unat ;; |
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37 | /* loc2 */ |
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38 | mov loc3 = ar.rsc |
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39 | |||
40 | .auto |
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41 | |||
42 | /* |
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43 | * Flush dirty registers to backing store. |
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44 | * After this ar.bsp and ar.bspstore are equal. |
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45 | */ |
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46 | flushrs |
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47 | mov loc4 = ar.bsp |
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48 | |||
49 | /* |
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50 | * Put RSE to enforced lazy mode. |
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51 | * So that ar.rnat can be read. |
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52 | */ |
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53 | and loc5 = ~3, loc3 |
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54 | mov ar.rsc = loc5 |
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55 | mov loc5 = ar.rnat |
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56 | |||
57 | .explicit |
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58 | |||
59 | mov loc6 = ar.lc |
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60 | |||
61 | /* |
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62 | * Save application registers |
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63 | */ |
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64 | st8 [in0] = loc0, 8 ;; /* save ar.pfs */ |
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65 | st8 [in0] = loc1, 8 ;; /* save ar.unat (caller) */ |
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66 | mov loc2 = in0 ;; |
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67 | add in0 = 8, in0 ;; /* skip ar.unat (callee) */ |
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68 | st8 [in0] = loc3, 8 ;; /* save ar.rsc */ |
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69 | st8 [in0] = loc4, 8 ;; /* save ar.bsp */ |
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70 | st8 [in0] = loc5, 8 ;; /* save ar.rnat */ |
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71 | st8 [in0] = loc6, 8 ;; /* save ar.lc */ |
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72 | |||
73 | /* |
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74 | * Save general registers including NaT bits |
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75 | */ |
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76 | st8.spill [in0] = r1, 8 ;; |
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77 | st8.spill [in0] = r4, 8 ;; |
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78 | st8.spill [in0] = r5, 8 ;; |
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79 | st8.spill [in0] = r6, 8 ;; |
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80 | st8.spill [in0] = r7, 8 ;; |
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81 | st8.spill [in0] = r12, 8 ;; /* save sp */ |
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82 | st8.spill [in0] = r13, 8 ;; /* save tp */ |
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83 | |||
84 | mov loc3 = ar.unat ;; |
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85 | st8 [loc2] = loc3 /* save ar.unat (callee) */ |
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86 | |||
87 | /* |
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88 | * Save branch registers |
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89 | */ |
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90 | mov loc2 = b0 ;; |
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91 | st8 [in0] = loc2, 8 /* save pc */ |
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92 | mov loc3 = b1 ;; |
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93 | st8 [in0] = loc3, 8 |
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94 | mov loc4 = b2 ;; |
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95 | st8 [in0] = loc4, 8 |
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96 | mov loc5 = b3 ;; |
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97 | st8 [in0] = loc5, 8 |
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98 | mov loc6 = b4 ;; |
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99 | st8 [in0] = loc6, 8 |
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100 | mov loc7 = b5 ;; |
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101 | st8 [in0] = loc7, 8 |
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102 | |||
103 | /* |
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104 | * Save predicate registers |
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105 | */ |
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106 | mov loc2 = pr ;; |
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1663 | vana | 107 | st8 [in0] = loc2, 16;; /* Next fpu registers should be spilled to 16B aligned address */ |
108 | |||
109 | /* |
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110 | * Save floating-point registers. |
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111 | */ |
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112 | stf.spill [in0] = f2, 16 ;; |
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113 | stf.spill [in0] = f3, 16 ;; |
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114 | stf.spill [in0] = f4, 16 ;; |
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115 | stf.spill [in0] = f5, 16 ;; |
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116 | |||
117 | stf.spill [in0] = f16, 16 ;; |
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118 | stf.spill [in0] = f17, 16 ;; |
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119 | stf.spill [in0] = f18, 16 ;; |
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120 | stf.spill [in0] = f19, 16 ;; |
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121 | stf.spill [in0] = f20, 16 ;; |
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122 | stf.spill [in0] = f21, 16 ;; |
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123 | stf.spill [in0] = f22, 16 ;; |
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124 | stf.spill [in0] = f23, 16 ;; |
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125 | stf.spill [in0] = f24, 16 ;; |
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126 | stf.spill [in0] = f25, 16 ;; |
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127 | stf.spill [in0] = f26, 16 ;; |
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128 | stf.spill [in0] = f27, 16 ;; |
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129 | stf.spill [in0] = f28, 16 ;; |
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130 | stf.spill [in0] = f29, 16 ;; |
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131 | stf.spill [in0] = f30, 16 ;; |
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132 | stf.spill [in0] = f31, 16 ;; |
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133 | |||
1125 | jermar | 134 | mov ar.unat = loc1 |
135 | |||
136 | add r8 = r0, r0, 1 /* context_save returns 1 */ |
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137 | br.ret.sptk.many b0 |
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138 | |||
139 | context_restore: |
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140 | alloc loc0 = ar.pfs, 1, 9, 0, 0 ;; |
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141 | |||
142 | ld8 loc0 = [in0], 8 ;; /* load ar.pfs */ |
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143 | ld8 loc1 = [in0], 8 ;; /* load ar.unat (caller) */ |
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144 | ld8 loc2 = [in0], 8 ;; /* load ar.unat (callee) */ |
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145 | ld8 loc3 = [in0], 8 ;; /* load ar.rsc */ |
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146 | ld8 loc4 = [in0], 8 ;; /* load ar.bsp */ |
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147 | ld8 loc5 = [in0], 8 ;; /* load ar.rnat */ |
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148 | ld8 loc6 = [in0], 8 ;; /* load ar.lc */ |
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149 | |||
150 | .auto |
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151 | |||
152 | /* |
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153 | * Invalidate the ALAT |
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154 | */ |
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155 | invala |
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156 | |||
157 | /* |
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158 | * Put RSE to enforced lazy mode. |
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159 | * So that ar.bspstore and ar.rnat can be written. |
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160 | */ |
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161 | movl loc8 = ~3 |
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162 | and loc8 = loc3, loc8 |
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163 | mov ar.rsc = loc8 |
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164 | |||
165 | /* |
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166 | * Flush dirty registers to backing store. |
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167 | * We do this because we want the following move |
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168 | * to ar.bspstore to assign the same value to ar.bsp. |
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169 | */ |
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170 | flushrs |
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171 | |||
172 | /* |
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173 | * Restore application registers |
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174 | */ |
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175 | mov ar.bspstore = loc4 /* rse.bspload = ar.bsp = ar.bspstore = loc4 */ |
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176 | mov ar.rnat = loc5 |
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177 | mov ar.pfs = loc0 |
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178 | mov ar.rsc = loc3 |
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179 | |||
180 | .explicit |
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181 | |||
182 | mov ar.unat = loc2 ;; |
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183 | mov ar.lc = loc6 |
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184 | |||
185 | /* |
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186 | * Restore general registers including NaT bits |
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187 | */ |
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188 | ld8.fill r1 = [in0], 8 ;; |
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189 | ld8.fill r4 = [in0], 8 ;; |
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190 | ld8.fill r5 = [in0], 8 ;; |
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191 | ld8.fill r6 = [in0], 8 ;; |
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192 | ld8.fill r7 = [in0], 8 ;; |
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193 | ld8.fill r12 = [in0], 8 ;; /* restore sp */ |
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194 | ld8.fill r13 = [in0], 8 ;; |
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195 | |||
196 | /* |
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197 | * Restore branch registers |
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198 | */ |
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199 | ld8 loc2 = [in0], 8 ;; /* restore pc */ |
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200 | mov b0 = loc2 |
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201 | ld8 loc3 = [in0], 8 ;; |
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202 | mov b1 = loc3 |
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203 | ld8 loc4 = [in0], 8 ;; |
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204 | mov b2 = loc4 |
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205 | ld8 loc5 = [in0], 8 ;; |
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206 | mov b3 = loc5 |
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207 | ld8 loc6 = [in0], 8 ;; |
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208 | mov b4 = loc6 |
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209 | ld8 loc7 = [in0], 8 ;; |
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210 | mov b5 = loc7 |
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211 | |||
212 | /* |
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213 | * Restore predicate registers |
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214 | */ |
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1663 | vana | 215 | ld8 loc2 = [in0], 16 ;; |
1125 | jermar | 216 | mov pr = loc2, ~0 |
1663 | vana | 217 | |
218 | /* |
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219 | * Restore floating-point registers. |
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220 | */ |
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221 | ldf.fill f2 = [in0], 16 ;; |
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222 | ldf.fill f3 = [in0], 16 ;; |
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223 | ldf.fill f4 = [in0], 16 ;; |
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224 | ldf.fill f5 = [in0], 16 ;; |
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225 | |||
226 | ldf.fill f16 = [in0], 16 ;; |
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227 | ldf.fill f17 = [in0], 16 ;; |
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228 | ldf.fill f18 = [in0], 16 ;; |
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229 | ldf.fill f19 = [in0], 16 ;; |
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230 | ldf.fill f20 = [in0], 16 ;; |
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231 | ldf.fill f21 = [in0], 16 ;; |
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232 | ldf.fill f22 = [in0], 16 ;; |
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233 | ldf.fill f23 = [in0], 16 ;; |
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234 | ldf.fill f24 = [in0], 16 ;; |
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235 | ldf.fill f25 = [in0], 16 ;; |
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236 | ldf.fill f26 = [in0], 16 ;; |
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237 | ldf.fill f27 = [in0], 16 ;; |
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238 | ldf.fill f28 = [in0], 16 ;; |
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239 | ldf.fill f29 = [in0], 16 ;; |
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240 | ldf.fill f30 = [in0], 16 ;; |
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241 | ldf.fill f31 = [in0], 16 ;; |
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1125 | jermar | 242 | |
243 | mov ar.unat = loc1 |
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244 | |||
245 | mov r8 = r0 /* context_restore returns 0 */ |
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246 | br.ret.sptk.many b0 |