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| Rev | Author | Line No. | Line |
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| 1110 | jermar | 1 | /* |
| 2 | * Copyright (C) 2001-2004 Jakub Jermar |
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| 3 | * All rights reserved. |
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| 4 | * |
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| 5 | * Redistribution and use in source and binary forms, with or without |
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| 6 | * modification, are permitted provided that the following conditions |
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| 7 | * are met: |
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| 8 | * |
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| 9 | * - Redistributions of source code must retain the above copyright |
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| 10 | * notice, this list of conditions and the following disclaimer. |
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| 11 | * - Redistributions in binary form must reproduce the above copyright |
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| 12 | * notice, this list of conditions and the following disclaimer in the |
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| 13 | * documentation and/or other materials provided with the distribution. |
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| 14 | * - The name of the author may not be used to endorse or promote products |
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| 15 | * derived from this software without specific prior written permission. |
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| 16 | * |
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| 17 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
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| 18 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
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| 19 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
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| 20 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
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| 21 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
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| 22 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
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| 23 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
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| 24 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
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| 25 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
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| 26 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
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| 27 | */ |
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| 28 | |||
| 29 | #ifndef __amd64_ATOMIC_H__ |
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| 30 | #define __amd64_ATOMIC_H__ |
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| 31 | |||
| 32 | static inline void atomic_inc(atomic_t *val) { |
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| 33 | __asm__ volatile ("lock incq %0\n" : "=m" (val->count)); |
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| 34 | } |
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| 35 | |||
| 36 | static inline void atomic_dec(atomic_t *val) { |
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| 37 | __asm__ volatile ("lock decq %0\n" : "=m" (val->count)); |
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| 38 | } |
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| 39 | |||
| 40 | static inline long atomic_postinc(atomic_t *val) |
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| 41 | { |
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| 42 | long r; |
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| 43 | |||
| 44 | __asm__ volatile ( |
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| 45 | "movq $1, %0\n" |
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| 46 | "lock xaddq %0, %1\n" |
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| 47 | : "=r" (r), "=m" (val->count) |
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| 48 | ); |
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| 49 | |||
| 50 | return r; |
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| 51 | } |
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| 52 | |||
| 53 | static inline long atomic_postdec(atomic_t *val) |
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| 54 | { |
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| 55 | long r; |
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| 56 | |||
| 57 | __asm__ volatile ( |
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| 58 | "movq $-1, %0\n" |
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| 59 | "lock xaddq %0, %1\n" |
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| 60 | : "=r" (r), "=m" (val->count) |
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| 61 | ); |
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| 62 | |||
| 63 | return r; |
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| 64 | } |
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| 65 | |||
| 66 | #define atomic_preinc(val) (atomic_postinc(val)+1) |
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| 67 | #define atomic_predec(val) (atomic_postdec(val)-1) |
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| 68 | |||
| 69 | #endif |