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| Rev | Author | Line No. | Line |
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| 1 | jermar | 1 | /* |
| 2071 | jermar | 2 | * Copyright (c) 2003-2004 Jakub Jermar |
| 1 | jermar | 3 | * All rights reserved. |
| 4 | * |
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| 5 | * Redistribution and use in source and binary forms, with or without |
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| 6 | * modification, are permitted provided that the following conditions |
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| 7 | * are met: |
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| 8 | * |
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| 9 | * - Redistributions of source code must retain the above copyright |
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| 10 | * notice, this list of conditions and the following disclaimer. |
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| 11 | * - Redistributions in binary form must reproduce the above copyright |
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| 12 | * notice, this list of conditions and the following disclaimer in the |
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| 13 | * documentation and/or other materials provided with the distribution. |
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| 14 | * - The name of the author may not be used to endorse or promote products |
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| 15 | * derived from this software without specific prior written permission. |
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| 16 | * |
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| 17 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
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| 18 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
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| 19 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
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| 20 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
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| 21 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
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| 22 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
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| 23 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
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| 24 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
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| 25 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
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| 26 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
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| 27 | */ |
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| 28 | |||
| 1776 | jermar | 29 | /** @addtogroup mips32mm |
| 1702 | cejka | 30 | * @{ |
| 31 | */ |
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| 32 | /** @file |
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| 33 | */ |
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| 34 | |||
| 1 | jermar | 35 | #include <arch/mm/tlb.h> |
| 727 | jermar | 36 | #include <mm/asid.h> |
| 1 | jermar | 37 | #include <mm/tlb.h> |
| 391 | jermar | 38 | #include <mm/page.h> |
| 703 | jermar | 39 | #include <mm/as.h> |
| 1 | jermar | 40 | #include <arch/cp0.h> |
| 41 | #include <panic.h> |
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| 42 | #include <arch.h> |
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| 268 | palkovsky | 43 | #include <symtab.h> |
| 391 | jermar | 44 | #include <synch/spinlock.h> |
| 45 | #include <print.h> |
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| 396 | jermar | 46 | #include <debug.h> |
| 983 | palkovsky | 47 | #include <align.h> |
| 1595 | palkovsky | 48 | #include <interrupt.h> |
| 268 | palkovsky | 49 | |
| 3392 | jermar | 50 | static void tlb_refill_fail(istate_t *); |
| 51 | static void tlb_invalid_fail(istate_t *); |
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| 52 | static void tlb_modified_fail(istate_t *); |
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| 391 | jermar | 53 | |
| 3392 | jermar | 54 | static pte_t *find_mapping_and_check(uintptr_t, int, istate_t *, int *); |
| 399 | jermar | 55 | |
| 3392 | jermar | 56 | /** Initialize TLB. |
| 391 | jermar | 57 | * |
| 58 | * Invalidate all entries and mark wired entries. |
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| 59 | */ |
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| 569 | jermar | 60 | void tlb_arch_init(void) |
| 389 | jermar | 61 | { |
| 599 | jermar | 62 | int i; |
| 63 | |||
| 389 | jermar | 64 | cp0_pagemask_write(TLB_PAGE_MASK_16K); |
| 599 | jermar | 65 | cp0_entry_hi_write(0); |
| 66 | cp0_entry_lo0_write(0); |
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| 67 | cp0_entry_lo1_write(0); |
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| 389 | jermar | 68 | |
| 599 | jermar | 69 | /* Clear and initialize TLB. */ |
| 70 | |||
| 71 | for (i = 0; i < TLB_ENTRY_COUNT; i++) { |
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| 72 | cp0_index_write(i); |
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| 73 | tlbwi(); |
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| 74 | } |
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| 598 | jermar | 75 | |
| 389 | jermar | 76 | /* |
| 77 | * The kernel is going to make use of some wired |
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| 391 | jermar | 78 | * entries (e.g. mapping kernel stacks in kseg3). |
| 389 | jermar | 79 | */ |
| 80 | cp0_wired_write(TLB_WIRED); |
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| 81 | } |
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| 82 | |||
| 3392 | jermar | 83 | /** Process TLB Refill Exception. |
| 391 | jermar | 84 | * |
| 3392 | jermar | 85 | * @param istate Interrupted register context. |
| 391 | jermar | 86 | */ |
| 958 | jermar | 87 | void tlb_refill(istate_t *istate) |
| 1 | jermar | 88 | { |
| 396 | jermar | 89 | entry_lo_t lo; |
| 1044 | jermar | 90 | entry_hi_t hi; |
| 91 | asid_t asid; |
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| 1780 | jermar | 92 | uintptr_t badvaddr; |
| 391 | jermar | 93 | pte_t *pte; |
| 1288 | jermar | 94 | int pfrc; |
| 397 | jermar | 95 | |
| 391 | jermar | 96 | badvaddr = cp0_badvaddr_read(); |
| 397 | jermar | 97 | |
| 1044 | jermar | 98 | spinlock_lock(&AS->lock); |
| 99 | asid = AS->asid; |
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| 100 | spinlock_unlock(&AS->lock); |
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| 399 | jermar | 101 | |
| 1044 | jermar | 102 | page_table_lock(AS, true); |
| 103 | |||
| 1411 | jermar | 104 | pte = find_mapping_and_check(badvaddr, PF_ACCESS_READ, istate, &pfrc); |
| 1288 | jermar | 105 | if (!pte) { |
| 106 | switch (pfrc) { |
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| 107 | case AS_PF_FAULT: |
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| 108 | goto fail; |
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| 109 | break; |
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| 110 | case AS_PF_DEFER: |
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| 111 | /* |
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| 112 | * The page fault came during copy_from_uspace() |
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| 113 | * or copy_to_uspace(). |
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| 114 | */ |
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| 115 | page_table_unlock(AS, true); |
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| 116 | return; |
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| 117 | default: |
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| 118 | panic("unexpected pfrc (%d)\n", pfrc); |
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| 119 | } |
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| 120 | } |
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| 391 | jermar | 121 | |
| 122 | /* |
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| 394 | jermar | 123 | * Record access to PTE. |
| 391 | jermar | 124 | */ |
| 394 | jermar | 125 | pte->a = 1; |
| 391 | jermar | 126 | |
| 3228 | decky | 127 | tlb_prepare_entry_hi(&hi, asid, badvaddr); |
| 3392 | jermar | 128 | tlb_prepare_entry_lo(&lo, pte->g, pte->p, pte->d, pte->cacheable, |
| 129 | pte->pfn); |
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| 394 | jermar | 130 | |
| 391 | jermar | 131 | /* |
| 132 | * New entry is to be inserted into TLB |
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| 133 | */ |
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| 399 | jermar | 134 | cp0_entry_hi_write(hi.value); |
| 3392 | jermar | 135 | if ((badvaddr / PAGE_SIZE) % 2 == 0) { |
| 396 | jermar | 136 | cp0_entry_lo0_write(lo.value); |
| 391 | jermar | 137 | cp0_entry_lo1_write(0); |
| 138 | } |
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| 139 | else { |
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| 140 | cp0_entry_lo0_write(0); |
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| 396 | jermar | 141 | cp0_entry_lo1_write(lo.value); |
| 391 | jermar | 142 | } |
| 612 | jermar | 143 | cp0_pagemask_write(TLB_PAGE_MASK_16K); |
| 391 | jermar | 144 | tlbwr(); |
| 145 | |||
| 1044 | jermar | 146 | page_table_unlock(AS, true); |
| 391 | jermar | 147 | return; |
| 148 | |||
| 149 | fail: |
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| 1044 | jermar | 150 | page_table_unlock(AS, true); |
| 958 | jermar | 151 | tlb_refill_fail(istate); |
| 391 | jermar | 152 | } |
| 153 | |||
| 3392 | jermar | 154 | /** Process TLB Invalid Exception. |
| 394 | jermar | 155 | * |
| 3392 | jermar | 156 | * @param istate Interrupted register context. |
| 394 | jermar | 157 | */ |
| 958 | jermar | 158 | void tlb_invalid(istate_t *istate) |
| 391 | jermar | 159 | { |
| 396 | jermar | 160 | tlb_index_t index; |
| 1780 | jermar | 161 | uintptr_t badvaddr; |
| 396 | jermar | 162 | entry_lo_t lo; |
| 399 | jermar | 163 | entry_hi_t hi; |
| 394 | jermar | 164 | pte_t *pte; |
| 1288 | jermar | 165 | int pfrc; |
| 394 | jermar | 166 | |
| 167 | badvaddr = cp0_badvaddr_read(); |
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| 168 | |||
| 169 | /* |
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| 170 | * Locate the faulting entry in TLB. |
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| 171 | */ |
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| 399 | jermar | 172 | hi.value = cp0_entry_hi_read(); |
| 3228 | decky | 173 | tlb_prepare_entry_hi(&hi, hi.asid, badvaddr); |
| 399 | jermar | 174 | cp0_entry_hi_write(hi.value); |
| 394 | jermar | 175 | tlbp(); |
| 396 | jermar | 176 | index.value = cp0_index_read(); |
| 1044 | jermar | 177 | |
| 178 | page_table_lock(AS, true); |
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| 394 | jermar | 179 | |
| 180 | /* |
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| 181 | * Fail if the entry is not in TLB. |
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| 182 | */ |
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| 396 | jermar | 183 | if (index.p) { |
| 184 | printf("TLB entry not found.\n"); |
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| 394 | jermar | 185 | goto fail; |
| 396 | jermar | 186 | } |
| 394 | jermar | 187 | |
| 1411 | jermar | 188 | pte = find_mapping_and_check(badvaddr, PF_ACCESS_READ, istate, &pfrc); |
| 1288 | jermar | 189 | if (!pte) { |
| 190 | switch (pfrc) { |
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| 191 | case AS_PF_FAULT: |
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| 192 | goto fail; |
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| 193 | break; |
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| 194 | case AS_PF_DEFER: |
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| 195 | /* |
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| 196 | * The page fault came during copy_from_uspace() |
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| 197 | * or copy_to_uspace(). |
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| 198 | */ |
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| 199 | page_table_unlock(AS, true); |
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| 200 | return; |
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| 201 | default: |
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| 202 | panic("unexpected pfrc (%d)\n", pfrc); |
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| 203 | } |
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| 204 | } |
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| 394 | jermar | 205 | |
| 206 | /* |
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| 207 | * Read the faulting TLB entry. |
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| 208 | */ |
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| 209 | tlbr(); |
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| 210 | |||
| 211 | /* |
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| 212 | * Record access to PTE. |
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| 213 | */ |
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| 214 | pte->a = 1; |
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| 215 | |||
| 3392 | jermar | 216 | tlb_prepare_entry_lo(&lo, pte->g, pte->p, pte->d, pte->cacheable, |
| 217 | pte->pfn); |
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| 394 | jermar | 218 | |
| 219 | /* |
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| 220 | * The entry is to be updated in TLB. |
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| 221 | */ |
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| 3392 | jermar | 222 | if ((badvaddr / PAGE_SIZE) % 2 == 0) |
| 396 | jermar | 223 | cp0_entry_lo0_write(lo.value); |
| 394 | jermar | 224 | else |
| 396 | jermar | 225 | cp0_entry_lo1_write(lo.value); |
| 612 | jermar | 226 | cp0_pagemask_write(TLB_PAGE_MASK_16K); |
| 394 | jermar | 227 | tlbwi(); |
| 228 | |||
| 1044 | jermar | 229 | page_table_unlock(AS, true); |
| 394 | jermar | 230 | return; |
| 231 | |||
| 232 | fail: |
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| 1044 | jermar | 233 | page_table_unlock(AS, true); |
| 958 | jermar | 234 | tlb_invalid_fail(istate); |
| 391 | jermar | 235 | } |
| 236 | |||
| 3392 | jermar | 237 | /** Process TLB Modified Exception. |
| 394 | jermar | 238 | * |
| 3392 | jermar | 239 | * @param istate Interrupted register context. |
| 394 | jermar | 240 | */ |
| 958 | jermar | 241 | void tlb_modified(istate_t *istate) |
| 391 | jermar | 242 | { |
| 396 | jermar | 243 | tlb_index_t index; |
| 1780 | jermar | 244 | uintptr_t badvaddr; |
| 396 | jermar | 245 | entry_lo_t lo; |
| 399 | jermar | 246 | entry_hi_t hi; |
| 394 | jermar | 247 | pte_t *pte; |
| 1288 | jermar | 248 | int pfrc; |
| 394 | jermar | 249 | |
| 250 | badvaddr = cp0_badvaddr_read(); |
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| 251 | |||
| 252 | /* |
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| 253 | * Locate the faulting entry in TLB. |
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| 254 | */ |
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| 399 | jermar | 255 | hi.value = cp0_entry_hi_read(); |
| 3228 | decky | 256 | tlb_prepare_entry_hi(&hi, hi.asid, badvaddr); |
| 399 | jermar | 257 | cp0_entry_hi_write(hi.value); |
| 394 | jermar | 258 | tlbp(); |
| 396 | jermar | 259 | index.value = cp0_index_read(); |
| 1044 | jermar | 260 | |
| 261 | page_table_lock(AS, true); |
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| 394 | jermar | 262 | |
| 263 | /* |
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| 264 | * Fail if the entry is not in TLB. |
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| 265 | */ |
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| 396 | jermar | 266 | if (index.p) { |
| 267 | printf("TLB entry not found.\n"); |
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| 394 | jermar | 268 | goto fail; |
| 396 | jermar | 269 | } |
| 394 | jermar | 270 | |
| 1411 | jermar | 271 | pte = find_mapping_and_check(badvaddr, PF_ACCESS_WRITE, istate, &pfrc); |
| 1288 | jermar | 272 | if (!pte) { |
| 273 | switch (pfrc) { |
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| 274 | case AS_PF_FAULT: |
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| 275 | goto fail; |
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| 276 | break; |
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| 277 | case AS_PF_DEFER: |
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| 278 | /* |
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| 279 | * The page fault came during copy_from_uspace() |
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| 280 | * or copy_to_uspace(). |
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| 281 | */ |
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| 282 | page_table_unlock(AS, true); |
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| 283 | return; |
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| 284 | default: |
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| 285 | panic("unexpected pfrc (%d)\n", pfrc); |
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| 286 | } |
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| 287 | } |
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| 394 | jermar | 288 | |
| 289 | /* |
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| 290 | * Fail if the page is not writable. |
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| 291 | */ |
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| 292 | if (!pte->w) |
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| 293 | goto fail; |
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| 294 | |||
| 295 | /* |
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| 296 | * Read the faulting TLB entry. |
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| 297 | */ |
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| 298 | tlbr(); |
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| 299 | |||
| 300 | /* |
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| 301 | * Record access and write to PTE. |
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| 302 | */ |
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| 303 | pte->a = 1; |
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| 831 | jermar | 304 | pte->d = 1; |
| 394 | jermar | 305 | |
| 3392 | jermar | 306 | tlb_prepare_entry_lo(&lo, pte->g, pte->p, pte->w, pte->cacheable, |
| 307 | pte->pfn); |
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| 394 | jermar | 308 | |
| 309 | /* |
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| 310 | * The entry is to be updated in TLB. |
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| 311 | */ |
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| 3392 | jermar | 312 | if ((badvaddr / PAGE_SIZE) % 2 == 0) |
| 396 | jermar | 313 | cp0_entry_lo0_write(lo.value); |
| 394 | jermar | 314 | else |
| 396 | jermar | 315 | cp0_entry_lo1_write(lo.value); |
| 612 | jermar | 316 | cp0_pagemask_write(TLB_PAGE_MASK_16K); |
| 394 | jermar | 317 | tlbwi(); |
| 318 | |||
| 1044 | jermar | 319 | page_table_unlock(AS, true); |
| 394 | jermar | 320 | return; |
| 321 | |||
| 322 | fail: |
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| 1044 | jermar | 323 | page_table_unlock(AS, true); |
| 958 | jermar | 324 | tlb_modified_fail(istate); |
| 391 | jermar | 325 | } |
| 326 | |||
| 958 | jermar | 327 | void tlb_refill_fail(istate_t *istate) |
| 391 | jermar | 328 | { |
| 324 | palkovsky | 329 | char *symbol = ""; |
| 330 | char *sym2 = ""; |
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| 331 | |||
| 958 | jermar | 332 | char *s = get_symtab_entry(istate->epc); |
| 332 | palkovsky | 333 | if (s) |
| 334 | symbol = s; |
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| 958 | jermar | 335 | s = get_symtab_entry(istate->ra); |
| 332 | palkovsky | 336 | if (s) |
| 337 | sym2 = s; |
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| 1595 | palkovsky | 338 | |
| 3392 | jermar | 339 | fault_if_from_uspace(istate, "TLB Refill Exception on %p", |
| 340 | cp0_badvaddr_read()); |
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| 341 | panic("%x: TLB Refill Exception at %x(%s<-%s)\n", cp0_badvaddr_read(), |
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| 342 | istate->epc, symbol, sym2); |
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| 1 | jermar | 343 | } |
| 344 | |||
| 391 | jermar | 345 | |
| 958 | jermar | 346 | void tlb_invalid_fail(istate_t *istate) |
| 1 | jermar | 347 | { |
| 268 | palkovsky | 348 | char *symbol = ""; |
| 349 | |||
| 958 | jermar | 350 | char *s = get_symtab_entry(istate->epc); |
| 332 | palkovsky | 351 | if (s) |
| 352 | symbol = s; |
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| 3392 | jermar | 353 | fault_if_from_uspace(istate, "TLB Invalid Exception on %p", |
| 354 | cp0_badvaddr_read()); |
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| 355 | panic("%x: TLB Invalid Exception at %x(%s)\n", cp0_badvaddr_read(), |
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| 356 | istate->epc, symbol); |
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| 1 | jermar | 357 | } |
| 358 | |||
| 958 | jermar | 359 | void tlb_modified_fail(istate_t *istate) |
| 389 | jermar | 360 | { |
| 361 | char *symbol = ""; |
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| 362 | |||
| 958 | jermar | 363 | char *s = get_symtab_entry(istate->epc); |
| 389 | jermar | 364 | if (s) |
| 365 | symbol = s; |
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| 3392 | jermar | 366 | fault_if_from_uspace(istate, "TLB Modified Exception on %p", |
| 367 | cp0_badvaddr_read()); |
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| 368 | panic("%x: TLB Modified Exception at %x(%s)\n", cp0_badvaddr_read(), |
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| 369 | istate->epc, symbol); |
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| 389 | jermar | 370 | } |
| 371 | |||
| 3392 | jermar | 372 | /** Try to find PTE for faulting address. |
| 394 | jermar | 373 | * |
| 703 | jermar | 374 | * The AS->lock must be held on entry to this function. |
| 394 | jermar | 375 | * |
| 3392 | jermar | 376 | * @param badvaddr Faulting virtual address. |
| 377 | * @param access Access mode that caused the fault. |
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| 378 | * @param istate Pointer to interrupted state. |
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| 379 | * @param pfrc Pointer to variable where as_page_fault() return code |
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| 380 | * will be stored. |
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| 394 | jermar | 381 | * |
| 3392 | jermar | 382 | * @return PTE on success, NULL otherwise. |
| 394 | jermar | 383 | */ |
| 3392 | jermar | 384 | pte_t * |
| 385 | find_mapping_and_check(uintptr_t badvaddr, int access, istate_t *istate, |
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| 386 | int *pfrc) |
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| 394 | jermar | 387 | { |
| 396 | jermar | 388 | entry_hi_t hi; |
| 394 | jermar | 389 | pte_t *pte; |
| 390 | |||
| 396 | jermar | 391 | hi.value = cp0_entry_hi_read(); |
| 394 | jermar | 392 | |
| 393 | /* |
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| 394 | * Handler cannot succeed if the ASIDs don't match. |
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| 395 | */ |
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| 703 | jermar | 396 | if (hi.asid != AS->asid) { |
| 397 | printf("EntryHi.asid=%d, AS->asid=%d\n", hi.asid, AS->asid); |
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| 394 | jermar | 398 | return NULL; |
| 396 | jermar | 399 | } |
| 703 | jermar | 400 | |
| 394 | jermar | 401 | /* |
| 703 | jermar | 402 | * Check if the mapping exists in page tables. |
| 403 | */ |
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| 756 | jermar | 404 | pte = page_mapping_find(AS, badvaddr); |
| 831 | jermar | 405 | if (pte && pte->p) { |
| 703 | jermar | 406 | /* |
| 407 | * Mapping found in page tables. |
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| 408 | * Immediately succeed. |
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| 409 | */ |
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| 410 | return pte; |
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| 411 | } else { |
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| 1288 | jermar | 412 | int rc; |
| 413 | |||
| 703 | jermar | 414 | /* |
| 415 | * Mapping not found in page tables. |
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| 416 | * Resort to higher-level page fault handler. |
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| 417 | */ |
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| 1044 | jermar | 418 | page_table_unlock(AS, true); |
| 1411 | jermar | 419 | switch (rc = as_page_fault(badvaddr, access, istate)) { |
| 1288 | jermar | 420 | case AS_PF_OK: |
| 703 | jermar | 421 | /* |
| 422 | * The higher-level page fault handler succeeded, |
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| 423 | * The mapping ought to be in place. |
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| 424 | */ |
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| 1044 | jermar | 425 | page_table_lock(AS, true); |
| 756 | jermar | 426 | pte = page_mapping_find(AS, badvaddr); |
| 831 | jermar | 427 | ASSERT(pte && pte->p); |
| 703 | jermar | 428 | return pte; |
| 1288 | jermar | 429 | break; |
| 430 | case AS_PF_DEFER: |
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| 1044 | jermar | 431 | page_table_lock(AS, true); |
| 1288 | jermar | 432 | *pfrc = AS_PF_DEFER; |
| 433 | return NULL; |
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| 434 | break; |
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| 435 | case AS_PF_FAULT: |
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| 436 | page_table_lock(AS, true); |
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| 1044 | jermar | 437 | printf("Page fault.\n"); |
| 1288 | jermar | 438 | *pfrc = AS_PF_FAULT; |
| 1044 | jermar | 439 | return NULL; |
| 1288 | jermar | 440 | break; |
| 441 | default: |
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| 442 | panic("unexpected rc (%d)\n", rc); |
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| 703 | jermar | 443 | } |
| 1044 | jermar | 444 | |
| 703 | jermar | 445 | } |
| 394 | jermar | 446 | } |
| 447 | |||
| 3392 | jermar | 448 | void |
| 449 | tlb_prepare_entry_lo(entry_lo_t *lo, bool g, bool v, bool d, bool cacheable, |
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| 450 | uintptr_t pfn) |
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| 394 | jermar | 451 | { |
| 399 | jermar | 452 | lo->value = 0; |
| 394 | jermar | 453 | lo->g = g; |
| 454 | lo->v = v; |
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| 455 | lo->d = d; |
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| 831 | jermar | 456 | lo->c = cacheable ? PAGE_CACHEABLE_EXC_WRITE : PAGE_UNCACHED; |
| 394 | jermar | 457 | lo->pfn = pfn; |
| 458 | } |
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| 399 | jermar | 459 | |
| 3228 | decky | 460 | void tlb_prepare_entry_hi(entry_hi_t *hi, asid_t asid, uintptr_t addr) |
| 399 | jermar | 461 | { |
| 983 | palkovsky | 462 | hi->value = ALIGN_DOWN(addr, PAGE_SIZE * 2); |
| 399 | jermar | 463 | hi->asid = asid; |
| 464 | } |
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| 569 | jermar | 465 | |
| 594 | jermar | 466 | /** Print contents of TLB. */ |
| 569 | jermar | 467 | void tlb_print(void) |
| 468 | { |
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| 612 | jermar | 469 | page_mask_t mask; |
| 594 | jermar | 470 | entry_lo_t lo0, lo1; |
| 704 | jermar | 471 | entry_hi_t hi, hi_save; |
| 2720 | decky | 472 | unsigned int i; |
| 594 | jermar | 473 | |
| 704 | jermar | 474 | hi_save.value = cp0_entry_hi_read(); |
| 2720 | decky | 475 | |
| 476 | printf("# ASID VPN2 MASK G V D C PFN\n"); |
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| 477 | printf("-- ---- ------ ---- - - - - ------\n"); |
||
| 478 | |||
| 594 | jermar | 479 | for (i = 0; i < TLB_ENTRY_COUNT; i++) { |
| 480 | cp0_index_write(i); |
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| 481 | tlbr(); |
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| 482 | |||
| 612 | jermar | 483 | mask.value = cp0_pagemask_read(); |
| 594 | jermar | 484 | hi.value = cp0_entry_hi_read(); |
| 485 | lo0.value = cp0_entry_lo0_read(); |
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| 486 | lo1.value = cp0_entry_lo1_read(); |
||
| 487 | |||
| 2720 | decky | 488 | printf("%-2u %-4u %#6x %#4x %1u %1u %1u %1u %#6x\n", |
| 3392 | jermar | 489 | i, hi.asid, hi.vpn2, mask.mask, |
| 490 | lo0.g, lo0.v, lo0.d, lo0.c, lo0.pfn); |
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| 2720 | decky | 491 | printf(" %1u %1u %1u %1u %#6x\n", |
| 3392 | jermar | 492 | lo1.g, lo1.v, lo1.d, lo1.c, lo1.pfn); |
| 594 | jermar | 493 | } |
| 704 | jermar | 494 | |
| 495 | cp0_entry_hi_write(hi_save.value); |
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| 569 | jermar | 496 | } |
| 598 | jermar | 497 | |
| 618 | jermar | 498 | /** Invalidate all not wired TLB entries. */ |
| 598 | jermar | 499 | void tlb_invalidate_all(void) |
| 500 | { |
||
| 599 | jermar | 501 | ipl_t ipl; |
| 502 | entry_lo_t lo0, lo1; |
||
| 704 | jermar | 503 | entry_hi_t hi_save; |
| 598 | jermar | 504 | int i; |
| 505 | |||
| 704 | jermar | 506 | hi_save.value = cp0_entry_hi_read(); |
| 599 | jermar | 507 | ipl = interrupts_disable(); |
| 598 | jermar | 508 | |
| 618 | jermar | 509 | for (i = TLB_WIRED; i < TLB_ENTRY_COUNT; i++) { |
| 598 | jermar | 510 | cp0_index_write(i); |
| 599 | jermar | 511 | tlbr(); |
| 512 | |||
| 513 | lo0.value = cp0_entry_lo0_read(); |
||
| 514 | lo1.value = cp0_entry_lo1_read(); |
||
| 515 | |||
| 516 | lo0.v = 0; |
||
| 517 | lo1.v = 0; |
||
| 518 | |||
| 519 | cp0_entry_lo0_write(lo0.value); |
||
| 520 | cp0_entry_lo1_write(lo1.value); |
||
| 521 | |||
| 598 | jermar | 522 | tlbwi(); |
| 523 | } |
||
| 599 | jermar | 524 | |
| 525 | interrupts_restore(ipl); |
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| 704 | jermar | 526 | cp0_entry_hi_write(hi_save.value); |
| 598 | jermar | 527 | } |
| 528 | |||
| 529 | /** Invalidate all TLB entries belonging to specified address space. |
||
| 530 | * |
||
| 531 | * @param asid Address space identifier. |
||
| 532 | */ |
||
| 533 | void tlb_invalidate_asid(asid_t asid) |
||
| 534 | { |
||
| 599 | jermar | 535 | ipl_t ipl; |
| 536 | entry_lo_t lo0, lo1; |
||
| 704 | jermar | 537 | entry_hi_t hi, hi_save; |
| 598 | jermar | 538 | int i; |
| 539 | |||
| 599 | jermar | 540 | ASSERT(asid != ASID_INVALID); |
| 541 | |||
| 704 | jermar | 542 | hi_save.value = cp0_entry_hi_read(); |
| 599 | jermar | 543 | ipl = interrupts_disable(); |
| 544 | |||
| 598 | jermar | 545 | for (i = 0; i < TLB_ENTRY_COUNT; i++) { |
| 546 | cp0_index_write(i); |
||
| 547 | tlbr(); |
||
| 548 | |||
| 599 | jermar | 549 | hi.value = cp0_entry_hi_read(); |
| 550 | |||
| 598 | jermar | 551 | if (hi.asid == asid) { |
| 599 | jermar | 552 | lo0.value = cp0_entry_lo0_read(); |
| 553 | lo1.value = cp0_entry_lo1_read(); |
||
| 554 | |||
| 555 | lo0.v = 0; |
||
| 556 | lo1.v = 0; |
||
| 557 | |||
| 558 | cp0_entry_lo0_write(lo0.value); |
||
| 559 | cp0_entry_lo1_write(lo1.value); |
||
| 560 | |||
| 598 | jermar | 561 | tlbwi(); |
| 562 | } |
||
| 563 | } |
||
| 599 | jermar | 564 | |
| 565 | interrupts_restore(ipl); |
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| 704 | jermar | 566 | cp0_entry_hi_write(hi_save.value); |
| 598 | jermar | 567 | } |
| 568 | |||
| 3392 | jermar | 569 | /** Invalidate TLB entries for specified page range belonging to specified |
| 570 | * address space. |
||
| 598 | jermar | 571 | * |
| 3392 | jermar | 572 | * @param asid Address space identifier. |
| 573 | * @param page First page whose TLB entry is to be invalidated. |
||
| 574 | * @param cnt Number of entries to invalidate. |
||
| 598 | jermar | 575 | */ |
| 1780 | jermar | 576 | void tlb_invalidate_pages(asid_t asid, uintptr_t page, count_t cnt) |
| 598 | jermar | 577 | { |
| 2745 | decky | 578 | unsigned int i; |
| 599 | jermar | 579 | ipl_t ipl; |
| 580 | entry_lo_t lo0, lo1; |
||
| 704 | jermar | 581 | entry_hi_t hi, hi_save; |
| 598 | jermar | 582 | tlb_index_t index; |
| 583 | |||
| 599 | jermar | 584 | ASSERT(asid != ASID_INVALID); |
| 585 | |||
| 704 | jermar | 586 | hi_save.value = cp0_entry_hi_read(); |
| 599 | jermar | 587 | ipl = interrupts_disable(); |
| 588 | |||
| 2745 | decky | 589 | for (i = 0; i < cnt + 1; i += 2) { |
| 727 | jermar | 590 | hi.value = 0; |
| 3228 | decky | 591 | tlb_prepare_entry_hi(&hi, asid, page + i * PAGE_SIZE); |
| 727 | jermar | 592 | cp0_entry_hi_write(hi.value); |
| 599 | jermar | 593 | |
| 727 | jermar | 594 | tlbp(); |
| 595 | index.value = cp0_index_read(); |
||
| 598 | jermar | 596 | |
| 727 | jermar | 597 | if (!index.p) { |
| 3392 | jermar | 598 | /* |
| 599 | * Entry was found, index register contains valid |
||
| 600 | * index. |
||
| 601 | */ |
||
| 727 | jermar | 602 | tlbr(); |
| 599 | jermar | 603 | |
| 727 | jermar | 604 | lo0.value = cp0_entry_lo0_read(); |
| 605 | lo1.value = cp0_entry_lo1_read(); |
||
| 599 | jermar | 606 | |
| 727 | jermar | 607 | lo0.v = 0; |
| 608 | lo1.v = 0; |
||
| 599 | jermar | 609 | |
| 727 | jermar | 610 | cp0_entry_lo0_write(lo0.value); |
| 611 | cp0_entry_lo1_write(lo1.value); |
||
| 599 | jermar | 612 | |
| 727 | jermar | 613 | tlbwi(); |
| 614 | } |
||
| 598 | jermar | 615 | } |
| 599 | jermar | 616 | |
| 617 | interrupts_restore(ipl); |
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| 704 | jermar | 618 | cp0_entry_hi_write(hi_save.value); |
| 598 | jermar | 619 | } |
| 1702 | cejka | 620 | |
| 1776 | jermar | 621 | /** @} |
| 1702 | cejka | 622 | */ |