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1 | jermar | 1 | /* |
319 | jermar | 2 | * Copyright (C) 2003-2004 Jakub Jermar |
1 | jermar | 3 | * All rights reserved. |
4 | * |
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5 | * Redistribution and use in source and binary forms, with or without |
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6 | * modification, are permitted provided that the following conditions |
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7 | * are met: |
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8 | * |
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9 | * - Redistributions of source code must retain the above copyright |
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10 | * notice, this list of conditions and the following disclaimer. |
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11 | * - Redistributions in binary form must reproduce the above copyright |
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12 | * notice, this list of conditions and the following disclaimer in the |
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13 | * documentation and/or other materials provided with the distribution. |
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14 | * - The name of the author may not be used to endorse or promote products |
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15 | * derived from this software without specific prior written permission. |
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16 | * |
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17 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
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18 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
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19 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
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20 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
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21 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
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22 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
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23 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
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24 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
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25 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
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26 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
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27 | */ |
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28 | |||
29 | #include <arch/mm/tlb.h> |
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130 | decky | 30 | #include <arch/mm/asid.h> |
1 | jermar | 31 | #include <mm/tlb.h> |
391 | jermar | 32 | #include <mm/page.h> |
33 | #include <mm/vm.h> |
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1 | jermar | 34 | #include <arch/cp0.h> |
35 | #include <panic.h> |
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36 | #include <arch.h> |
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268 | palkovsky | 37 | #include <symtab.h> |
391 | jermar | 38 | #include <synch/spinlock.h> |
39 | #include <print.h> |
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396 | jermar | 40 | #include <debug.h> |
268 | palkovsky | 41 | |
391 | jermar | 42 | static void tlb_refill_fail(struct exception_regdump *pstate); |
43 | static void tlb_invalid_fail(struct exception_regdump *pstate); |
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44 | static void tlb_modified_fail(struct exception_regdump *pstate); |
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45 | |||
394 | jermar | 46 | static pte_t *find_mapping_and_check(__address badvaddr); |
399 | jermar | 47 | |
396 | jermar | 48 | static void prepare_entry_lo(entry_lo_t *lo, bool g, bool v, bool d, int c, __address pfn); |
399 | jermar | 49 | static void prepare_entry_hi(entry_hi_t *hi, asid_t asid, __address addr); |
394 | jermar | 50 | |
391 | jermar | 51 | /** Initialize TLB |
52 | * |
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53 | * Initialize TLB. |
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54 | * Invalidate all entries and mark wired entries. |
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55 | */ |
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569 | jermar | 56 | void tlb_arch_init(void) |
389 | jermar | 57 | { |
58 | cp0_pagemask_write(TLB_PAGE_MASK_16K); |
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59 | |||
598 | jermar | 60 | tlb_invalidate_all(); |
61 | |||
389 | jermar | 62 | /* |
63 | * The kernel is going to make use of some wired |
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391 | jermar | 64 | * entries (e.g. mapping kernel stacks in kseg3). |
389 | jermar | 65 | */ |
66 | cp0_wired_write(TLB_WIRED); |
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67 | } |
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68 | |||
391 | jermar | 69 | /** Process TLB Refill Exception |
70 | * |
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71 | * Process TLB Refill Exception. |
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72 | * |
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73 | * @param pstate Interrupted register context. |
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74 | */ |
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317 | palkovsky | 75 | void tlb_refill(struct exception_regdump *pstate) |
1 | jermar | 76 | { |
396 | jermar | 77 | entry_lo_t lo; |
399 | jermar | 78 | entry_hi_t hi; |
391 | jermar | 79 | __address badvaddr; |
80 | pte_t *pte; |
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397 | jermar | 81 | |
391 | jermar | 82 | badvaddr = cp0_badvaddr_read(); |
397 | jermar | 83 | |
394 | jermar | 84 | spinlock_lock(&VM->lock); |
399 | jermar | 85 | |
394 | jermar | 86 | pte = find_mapping_and_check(badvaddr); |
87 | if (!pte) |
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391 | jermar | 88 | goto fail; |
89 | |||
90 | /* |
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394 | jermar | 91 | * Record access to PTE. |
391 | jermar | 92 | */ |
394 | jermar | 93 | pte->a = 1; |
391 | jermar | 94 | |
399 | jermar | 95 | prepare_entry_hi(&hi, VM->asid, badvaddr); |
403 | jermar | 96 | prepare_entry_lo(&lo, pte->lo.g, pte->lo.v, pte->lo.d, pte->lo.c, pte->lo.pfn); |
394 | jermar | 97 | |
391 | jermar | 98 | /* |
99 | * New entry is to be inserted into TLB |
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100 | */ |
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399 | jermar | 101 | cp0_entry_hi_write(hi.value); |
391 | jermar | 102 | if ((badvaddr/PAGE_SIZE) % 2 == 0) { |
396 | jermar | 103 | cp0_entry_lo0_write(lo.value); |
391 | jermar | 104 | cp0_entry_lo1_write(0); |
105 | } |
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106 | else { |
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107 | cp0_entry_lo0_write(0); |
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396 | jermar | 108 | cp0_entry_lo1_write(lo.value); |
391 | jermar | 109 | } |
110 | tlbwr(); |
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111 | |||
112 | spinlock_unlock(&VM->lock); |
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113 | return; |
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114 | |||
115 | fail: |
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116 | spinlock_unlock(&VM->lock); |
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117 | tlb_refill_fail(pstate); |
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118 | } |
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119 | |||
394 | jermar | 120 | /** Process TLB Invalid Exception |
121 | * |
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122 | * Process TLB Invalid Exception. |
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123 | * |
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124 | * @param pstate Interrupted register context. |
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125 | */ |
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391 | jermar | 126 | void tlb_invalid(struct exception_regdump *pstate) |
127 | { |
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396 | jermar | 128 | tlb_index_t index; |
394 | jermar | 129 | __address badvaddr; |
396 | jermar | 130 | entry_lo_t lo; |
399 | jermar | 131 | entry_hi_t hi; |
394 | jermar | 132 | pte_t *pte; |
133 | |||
134 | badvaddr = cp0_badvaddr_read(); |
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135 | |||
136 | /* |
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137 | * Locate the faulting entry in TLB. |
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138 | */ |
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399 | jermar | 139 | hi.value = cp0_entry_hi_read(); |
140 | prepare_entry_hi(&hi, hi.asid, badvaddr); |
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141 | cp0_entry_hi_write(hi.value); |
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394 | jermar | 142 | tlbp(); |
396 | jermar | 143 | index.value = cp0_index_read(); |
394 | jermar | 144 | |
145 | spinlock_lock(&VM->lock); |
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146 | |||
147 | /* |
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148 | * Fail if the entry is not in TLB. |
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149 | */ |
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396 | jermar | 150 | if (index.p) { |
151 | printf("TLB entry not found.\n"); |
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394 | jermar | 152 | goto fail; |
396 | jermar | 153 | } |
394 | jermar | 154 | |
155 | pte = find_mapping_and_check(badvaddr); |
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156 | if (!pte) |
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157 | goto fail; |
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158 | |||
159 | /* |
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160 | * Read the faulting TLB entry. |
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161 | */ |
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162 | tlbr(); |
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163 | |||
164 | /* |
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165 | * Record access to PTE. |
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166 | */ |
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167 | pte->a = 1; |
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168 | |||
403 | jermar | 169 | prepare_entry_lo(&lo, pte->lo.g, pte->lo.v, pte->lo.d, pte->lo.c, pte->lo.pfn); |
394 | jermar | 170 | |
171 | /* |
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172 | * The entry is to be updated in TLB. |
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173 | */ |
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174 | if ((badvaddr/PAGE_SIZE) % 2 == 0) |
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396 | jermar | 175 | cp0_entry_lo0_write(lo.value); |
394 | jermar | 176 | else |
396 | jermar | 177 | cp0_entry_lo1_write(lo.value); |
394 | jermar | 178 | tlbwi(); |
179 | |||
180 | spinlock_unlock(&VM->lock); |
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181 | return; |
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182 | |||
183 | fail: |
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184 | spinlock_unlock(&VM->lock); |
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391 | jermar | 185 | tlb_invalid_fail(pstate); |
186 | } |
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187 | |||
394 | jermar | 188 | /** Process TLB Modified Exception |
189 | * |
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190 | * Process TLB Modified Exception. |
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191 | * |
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192 | * @param pstate Interrupted register context. |
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193 | */ |
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391 | jermar | 194 | void tlb_modified(struct exception_regdump *pstate) |
195 | { |
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396 | jermar | 196 | tlb_index_t index; |
394 | jermar | 197 | __address badvaddr; |
396 | jermar | 198 | entry_lo_t lo; |
399 | jermar | 199 | entry_hi_t hi; |
394 | jermar | 200 | pte_t *pte; |
201 | |||
202 | badvaddr = cp0_badvaddr_read(); |
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203 | |||
204 | /* |
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205 | * Locate the faulting entry in TLB. |
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206 | */ |
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399 | jermar | 207 | hi.value = cp0_entry_hi_read(); |
208 | prepare_entry_hi(&hi, hi.asid, badvaddr); |
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209 | cp0_entry_hi_write(hi.value); |
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394 | jermar | 210 | tlbp(); |
396 | jermar | 211 | index.value = cp0_index_read(); |
394 | jermar | 212 | |
213 | spinlock_lock(&VM->lock); |
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214 | |||
215 | /* |
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216 | * Fail if the entry is not in TLB. |
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217 | */ |
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396 | jermar | 218 | if (index.p) { |
219 | printf("TLB entry not found.\n"); |
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394 | jermar | 220 | goto fail; |
396 | jermar | 221 | } |
394 | jermar | 222 | |
223 | pte = find_mapping_and_check(badvaddr); |
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224 | if (!pte) |
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225 | goto fail; |
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226 | |||
227 | /* |
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228 | * Fail if the page is not writable. |
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229 | */ |
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230 | if (!pte->w) |
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231 | goto fail; |
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232 | |||
233 | /* |
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234 | * Read the faulting TLB entry. |
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235 | */ |
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236 | tlbr(); |
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237 | |||
238 | /* |
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239 | * Record access and write to PTE. |
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240 | */ |
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241 | pte->a = 1; |
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403 | jermar | 242 | pte->lo.d = 1; |
394 | jermar | 243 | |
403 | jermar | 244 | prepare_entry_lo(&lo, pte->lo.g, pte->lo.v, pte->w, pte->lo.c, pte->lo.pfn); |
394 | jermar | 245 | |
246 | /* |
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247 | * The entry is to be updated in TLB. |
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248 | */ |
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249 | if ((badvaddr/PAGE_SIZE) % 2 == 0) |
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396 | jermar | 250 | cp0_entry_lo0_write(lo.value); |
394 | jermar | 251 | else |
396 | jermar | 252 | cp0_entry_lo1_write(lo.value); |
394 | jermar | 253 | tlbwi(); |
254 | |||
255 | spinlock_unlock(&VM->lock); |
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256 | return; |
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257 | |||
258 | fail: |
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259 | spinlock_unlock(&VM->lock); |
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391 | jermar | 260 | tlb_modified_fail(pstate); |
261 | } |
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262 | |||
263 | void tlb_refill_fail(struct exception_regdump *pstate) |
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264 | { |
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324 | palkovsky | 265 | char *symbol = ""; |
266 | char *sym2 = ""; |
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267 | |||
332 | palkovsky | 268 | char *s = get_symtab_entry(pstate->epc); |
269 | if (s) |
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270 | symbol = s; |
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271 | s = get_symtab_entry(pstate->ra); |
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272 | if (s) |
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273 | sym2 = s; |
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391 | jermar | 274 | panic("%X: TLB Refill Exception at %X(%s<-%s)\n", cp0_badvaddr_read(), pstate->epc, symbol, sym2); |
1 | jermar | 275 | } |
276 | |||
391 | jermar | 277 | |
278 | void tlb_invalid_fail(struct exception_regdump *pstate) |
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1 | jermar | 279 | { |
268 | palkovsky | 280 | char *symbol = ""; |
281 | |||
332 | palkovsky | 282 | char *s = get_symtab_entry(pstate->epc); |
283 | if (s) |
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284 | symbol = s; |
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394 | jermar | 285 | panic("%X: TLB Invalid Exception at %X(%s)\n", cp0_badvaddr_read(), pstate->epc, symbol); |
1 | jermar | 286 | } |
287 | |||
391 | jermar | 288 | void tlb_modified_fail(struct exception_regdump *pstate) |
389 | jermar | 289 | { |
290 | char *symbol = ""; |
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291 | |||
292 | char *s = get_symtab_entry(pstate->epc); |
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293 | if (s) |
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294 | symbol = s; |
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394 | jermar | 295 | panic("%X: TLB Modified Exception at %X(%s)\n", cp0_badvaddr_read(), pstate->epc, symbol); |
389 | jermar | 296 | } |
297 | |||
396 | jermar | 298 | /** Invalidate TLB entries with specified ASID |
299 | * |
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300 | * Invalidate TLB entries with specified ASID. |
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301 | * |
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302 | * @param asid ASID. |
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303 | */ |
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304 | void tlb_invalidate(asid_t asid) |
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1 | jermar | 305 | { |
396 | jermar | 306 | entry_hi_t hi; |
413 | jermar | 307 | ipl_t ipl; |
396 | jermar | 308 | int i; |
130 | decky | 309 | |
396 | jermar | 310 | ASSERT(asid != ASID_INVALID); |
311 | |||
413 | jermar | 312 | ipl = interrupts_disable(); |
130 | decky | 313 | |
594 | jermar | 314 | for (i = 0; i < TLB_ENTRY_COUNT; i++) { |
396 | jermar | 315 | cp0_index_write(i); |
316 | tlbr(); |
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317 | |||
318 | hi.value = cp0_entry_hi_read(); |
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319 | if (hi.asid == asid) { |
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320 | cp0_pagemask_write(TLB_PAGE_MASK_16K); |
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321 | cp0_entry_hi_write(0); |
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322 | cp0_entry_lo0_write(0); |
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323 | cp0_entry_lo1_write(0); |
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324 | tlbwi(); |
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325 | } |
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326 | } |
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130 | decky | 327 | |
413 | jermar | 328 | interrupts_restore(ipl); |
1 | jermar | 329 | } |
394 | jermar | 330 | |
331 | /** Try to find PTE for faulting address |
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332 | * |
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333 | * Try to find PTE for faulting address. |
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334 | * The VM->lock must be held on entry to this function. |
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335 | * |
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336 | * @param badvaddr Faulting virtual address. |
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337 | * |
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338 | * @return PTE on success, NULL otherwise. |
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339 | */ |
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340 | pte_t *find_mapping_and_check(__address badvaddr) |
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341 | { |
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396 | jermar | 342 | entry_hi_t hi; |
394 | jermar | 343 | pte_t *pte; |
344 | |||
396 | jermar | 345 | hi.value = cp0_entry_hi_read(); |
394 | jermar | 346 | |
347 | /* |
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348 | * Handler cannot succeed if the ASIDs don't match. |
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349 | */ |
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396 | jermar | 350 | if (hi.asid != VM->asid) { |
351 | printf("EntryHi.asid=%d, VM->asid=%d\n", hi.asid, VM->asid); |
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394 | jermar | 352 | return NULL; |
396 | jermar | 353 | } |
394 | jermar | 354 | |
355 | /* |
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356 | * Handler cannot succeed if badvaddr has no mapping. |
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357 | */ |
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492 | jermar | 358 | pte = page_mapping_find(badvaddr, 0); |
396 | jermar | 359 | if (!pte) { |
360 | printf("No such mapping.\n"); |
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394 | jermar | 361 | return NULL; |
396 | jermar | 362 | } |
394 | jermar | 363 | |
364 | /* |
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365 | * Handler cannot succeed if the mapping is marked as invalid. |
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366 | */ |
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403 | jermar | 367 | if (!pte->lo.v) { |
396 | jermar | 368 | printf("Invalid mapping.\n"); |
394 | jermar | 369 | return NULL; |
396 | jermar | 370 | } |
394 | jermar | 371 | |
372 | return pte; |
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373 | } |
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374 | |||
396 | jermar | 375 | void prepare_entry_lo(entry_lo_t *lo, bool g, bool v, bool d, int c, __address pfn) |
394 | jermar | 376 | { |
399 | jermar | 377 | lo->value = 0; |
394 | jermar | 378 | lo->g = g; |
379 | lo->v = v; |
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380 | lo->d = d; |
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381 | lo->c = c; |
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382 | lo->pfn = pfn; |
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383 | } |
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399 | jermar | 384 | |
385 | void prepare_entry_hi(entry_hi_t *hi, asid_t asid, __address addr) |
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386 | { |
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387 | hi->value = (((addr/PAGE_SIZE)/2)*PAGE_SIZE*2); |
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388 | hi->asid = asid; |
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389 | } |
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569 | jermar | 390 | |
594 | jermar | 391 | /** Print contents of TLB. */ |
569 | jermar | 392 | void tlb_print(void) |
393 | { |
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594 | jermar | 394 | entry_lo_t lo0, lo1; |
395 | entry_hi_t hi; |
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396 | int i; |
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397 | |||
398 | printf("TLB:\n"); |
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399 | for (i = 0; i < TLB_ENTRY_COUNT; i++) { |
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400 | cp0_index_write(i); |
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401 | tlbr(); |
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402 | |||
403 | hi.value = cp0_entry_hi_read(); |
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404 | lo0.value = cp0_entry_lo0_read(); |
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405 | lo1.value = cp0_entry_lo1_read(); |
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406 | |||
407 | printf("%d: asid=%d, vpn2=%d\tg[0]=%d, v[0]=%d, d[0]=%d, c[0]=%B, pfn[0]=%d\n" |
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408 | "\t\t\tg[1]=%d, v[1]=%d, d[1]=%d, c[1]=%B, pfn[1]=%d\n", |
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409 | i, hi.asid, hi.vpn2, lo0.g, lo0.v, lo0.d, lo0.c, lo0.pfn, |
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410 | lo1.g, lo1.v, lo1.d, lo1.c, lo1.pfn); |
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411 | } |
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569 | jermar | 412 | } |
598 | jermar | 413 | |
414 | /** Invalidate all TLB entries. */ |
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415 | void tlb_invalidate_all(void) |
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416 | { |
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417 | int i; |
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418 | |||
419 | cp0_entry_hi_write(0); |
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420 | cp0_entry_lo0_write(0); |
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421 | cp0_entry_lo1_write(0); |
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422 | |||
423 | for (i = 0; i < TLB_ENTRY_COUNT; i++) { |
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424 | cp0_index_write(i); |
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425 | tlbwi(); |
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426 | } |
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427 | } |
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428 | |||
429 | /** Invalidate all TLB entries belonging to specified address space. |
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430 | * |
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431 | * @param asid Address space identifier. |
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432 | */ |
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433 | void tlb_invalidate_asid(asid_t asid) |
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434 | { |
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435 | entry_hi_t hi; |
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436 | int i; |
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437 | |||
438 | for (i = 0; i < TLB_ENTRY_COUNT; i++) { |
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439 | cp0_index_write(i); |
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440 | tlbr(); |
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441 | |||
442 | if (hi.asid == asid) { |
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443 | cp0_entry_lo0_write(0); |
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444 | cp0_entry_lo1_write(0); |
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445 | tlbwi(); |
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446 | } |
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447 | } |
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448 | |||
449 | } |
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450 | |||
451 | /** Invalidate TLB entry for specified page belonging to specified address space. |
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452 | * |
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453 | * @param asid Address space identifier. |
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454 | * @param page Page whose TLB entry is to be invalidated. |
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455 | */ |
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456 | void tlb_invalidate_page(asid_t asid, __address page) |
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457 | { |
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458 | entry_hi_t hi; |
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459 | tlb_index_t index; |
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460 | int i; |
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461 | |||
462 | hi.value = 0; |
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463 | prepare_entry_hi(&hi, asid, page); |
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464 | |||
465 | tlbp(); |
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466 | index.value = cp0_index_read(); |
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467 | |||
468 | if (!index.p) { |
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469 | /* Entry was found, index register contains valid index. */ |
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470 | cp0_entry_lo0_write(0); |
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471 | cp0_entry_lo1_write(0); |
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472 | tlbwi(); |
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473 | } |
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474 | } |