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35 | jermar | 1 | # |
2 | # Copyright (C) 2005 Jakub Jermar |
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3 | # All rights reserved. |
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4 | # |
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5 | # Redistribution and use in source and binary forms, with or without |
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6 | # modification, are permitted provided that the following conditions |
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7 | # are met: |
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8 | # |
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9 | # - Redistributions of source code must retain the above copyright |
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10 | # notice, this list of conditions and the following disclaimer. |
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11 | # - Redistributions in binary form must reproduce the above copyright |
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12 | # notice, this list of conditions and the following disclaimer in the |
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13 | # documentation and/or other materials provided with the distribution. |
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14 | # - The name of the author may not be used to endorse or promote products |
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15 | # derived from this software without specific prior written permission. |
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16 | # |
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17 | # THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
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18 | # IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
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19 | # OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
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20 | # IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
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21 | # INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
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22 | # NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
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23 | # DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
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24 | # THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
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25 | # (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
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26 | # THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
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27 | # |
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28 | |||
473 | jermar | 29 | #include <arch/register.h> |
869 | vana | 30 | #include <arch/mm/page.h> |
31 | #include <arch/mm/asid.h> |
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32 | #include <mm/asid.h> |
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473 | jermar | 33 | |
869 | vana | 34 | #define RR_MASK (0xFFFFFFFF00000002) |
35 | #define RID_SHIFT 8 |
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36 | #define PS_SHIFT 2 |
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37 | |||
38 | #define KERNEL_TRANSLATION_I 0x0010000000000661 |
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39 | #define KERNEL_TRANSLATION_D 0x0010000000000661 |
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40 | |||
60 | jermar | 41 | .section K_TEXT_START |
42 | |||
35 | jermar | 43 | .global kernel_image_start |
44 | |||
37 | jermar | 45 | stack0: |
35 | jermar | 46 | kernel_image_start: |
81 | jermar | 47 | .auto |
412 | jermar | 48 | |
893 | jermar | 49 | # Fill TR.i and TR.d using Region Register #VRN_KERNEL |
869 | vana | 50 | |
51 | movl r8=(VRN_KERNEL<<VRN_SHIFT) |
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52 | mov r9=rr[r8] |
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53 | movl r10=(RR_MASK) |
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54 | and r9=r10,r9 |
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901 | jermar | 55 | movl r10=((RID_KERNEL<<RID_SHIFT)|(KERNEL_PAGE_WIDTH<<PS_SHIFT)) |
869 | vana | 56 | or r9=r10,r9 |
57 | mov rr[r8]=r9 |
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58 | |||
59 | movl r8=(VRN_KERNEL<<VRN_SHIFT) |
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60 | mov cr.ifa=r8 |
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61 | movl r10=(KERNEL_PAGE_WIDTH<<PS_SHIFT) |
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62 | mov cr.itir=r10 |
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63 | movl r10=(KERNEL_TRANSLATION_I) |
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64 | itr.i itr[r0]=r10 |
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65 | movl r10=(KERNEL_TRANSLATION_D) |
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66 | itr.d dtr[r0]=r10 |
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67 | |||
81 | jermar | 68 | # initialize PSR |
412 | jermar | 69 | mov psr.l = r0 |
70 | srlz.i |
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71 | srlz.d |
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893 | jermar | 72 | movl r10=(PSR_DT_MASK|PSR_RT_MASK|PSR_IT_MASK|PSR_IC_MASK) /* Enable paging */ |
869 | vana | 73 | mov r9=psr |
74 | or r10=r10,r9 |
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75 | mov cr.ipsr=r10 |
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76 | mov cr.ifs=r0 |
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77 | movl r8=paging_start |
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78 | mov cr.iip=r8 |
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473 | jermar | 79 | srlz.d |
869 | vana | 80 | srlz.i |
879 | vana | 81 | |
893 | jermar | 82 | .explicit |
83 | /* |
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84 | * Return From Interupt is the only the way to fill upper half word of PSR. |
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85 | */ |
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86 | rfi;; |
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869 | vana | 87 | {nop 0;;} |
88 | {nop 0;;} |
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89 | {nop 0;;} |
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90 | {nop 0;;} |
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91 | {nop 0;;} |
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92 | {nop 0;;} |
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93 | {nop 0;;} |
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94 | {nop 0;;} |
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879 | vana | 95 | |
96 | .global paging_start |
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97 | paging_start: |
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893 | jermar | 98 | |
99 | /* |
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100 | * Now we are paging. |
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101 | */ |
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102 | |||
869 | vana | 103 | {nop 0;;} |
104 | {nop 0;;} |
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105 | {nop 0;;} |
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106 | {nop 0;;} |
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107 | {nop 0;;} |
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108 | {nop 0;;} |
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109 | {nop 0;;} |
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110 | {nop 0;;} |
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111 | |||
473 | jermar | 112 | # switch to register bank 1 |
113 | bsw.1 |
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114 | |||
74 | jermar | 115 | # initialize register stack |
81 | jermar | 116 | mov ar.rsc = r0 |
893 | jermar | 117 | movl r8=(VRN_KERNEL<<VRN_SHIFT) ;; |
869 | vana | 118 | mov ar.bspstore = r8 |
81 | jermar | 119 | loadrs |
36 | jermar | 120 | |
74 | jermar | 121 | # initialize memory stack to some sane value |
872 | vana | 122 | movl r12 = stack0;; |
869 | vana | 123 | |
81 | jermar | 124 | add r12 = - 16, r12 /* allocate a scratch area on the stack */ |
60 | jermar | 125 | |
74 | jermar | 126 | # initialize gp (Global Pointer) register |
869 | vana | 127 | movl r1 = _hardcoded_load_address ;; |
128 | |||
893 | jermar | 129 | /* |
130 | * Initialize hardcoded_* variables. |
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131 | */ |
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106 | jermar | 132 | movl r14 = _hardcoded_ktext_size |
133 | movl r15 = _hardcoded_kdata_size |
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134 | movl r16 = _hardcoded_load_address |
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135 | addl r17 = @gprel(hardcoded_ktext_size), gp |
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136 | addl r18 = @gprel(hardcoded_kdata_size), gp |
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137 | addl r19 = @gprel(hardcoded_load_address), gp |
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138 | ;; |
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870 | vana | 139 | st8 [r17] = r14 |
140 | st8 [r18] = r15 |
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106 | jermar | 141 | st8 [r19] = r16 |
869 | vana | 142 | |
893 | jermar | 143 | movl r18=main_bsp ;; |
144 | mov b1=r18 ;; |
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869 | vana | 145 | br.call.sptk.many b0=b1 |
51 | jermar | 146 | |
36 | jermar | 147 | 0: |
39 | jermar | 148 | br 0b |