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35 | jermar | 1 | # |
2 | # Copyright (C) 2005 Jakub Jermar |
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3 | # All rights reserved. |
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4 | # |
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5 | # Redistribution and use in source and binary forms, with or without |
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6 | # modification, are permitted provided that the following conditions |
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7 | # are met: |
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8 | # |
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9 | # - Redistributions of source code must retain the above copyright |
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10 | # notice, this list of conditions and the following disclaimer. |
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11 | # - Redistributions in binary form must reproduce the above copyright |
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12 | # notice, this list of conditions and the following disclaimer in the |
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13 | # documentation and/or other materials provided with the distribution. |
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14 | # - The name of the author may not be used to endorse or promote products |
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15 | # derived from this software without specific prior written permission. |
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16 | # |
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17 | # THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
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18 | # IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
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19 | # OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
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20 | # IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
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21 | # INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
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22 | # NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
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23 | # DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
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24 | # THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
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25 | # (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
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26 | # THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
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27 | # |
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28 | |||
869 | vana | 29 | |
473 | jermar | 30 | #include <arch/register.h> |
869 | vana | 31 | #include <arch/mm/page.h> |
32 | #include <arch/mm/asid.h> |
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33 | #include <mm/asid.h> |
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473 | jermar | 34 | |
869 | vana | 35 | |
36 | #define RR_MASK (0xFFFFFFFF00000002) |
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37 | #define RID_SHIFT 8 |
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38 | #define PS_SHIFT 2 |
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39 | |||
40 | |||
41 | #define KERNEL_TRANSLATION_I 0x0010000000000661 |
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42 | #define KERNEL_TRANSLATION_D 0x0010000000000661 |
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43 | |||
44 | |||
60 | jermar | 45 | .section K_TEXT_START |
46 | |||
35 | jermar | 47 | .global kernel_image_start |
48 | |||
37 | jermar | 49 | stack0: |
35 | jermar | 50 | kernel_image_start: |
81 | jermar | 51 | .auto |
412 | jermar | 52 | |
869 | vana | 53 | #Fill TR.i and TR.d and enable paging |
54 | |||
55 | mov r9=rr[r0] |
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56 | movl r10=(RR_MASK) |
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57 | and r9=r10,r9 |
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58 | movl r10=((ASID2RID(ASID_KERNEL,VRN_KERNEL)<<RID_SHIFT)|(KERNEL_PAGE_WIDTH<<PS_SHIFT)) |
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59 | or r9=r10,r9 |
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60 | mov rr[r0]=r9 |
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61 | |||
62 | |||
63 | |||
64 | movl r8=(VRN_KERNEL<<VRN_SHIFT) |
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65 | mov r9=rr[r8] |
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66 | movl r10=(RR_MASK) |
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67 | and r9=r10,r9 |
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68 | movl r10=((ASID2RID(ASID_KERNEL,VRN_KERNEL)<<RID_SHIFT)|(KERNEL_PAGE_WIDTH<<PS_SHIFT)) |
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69 | or r9=r10,r9 |
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70 | mov rr[r8]=r9 |
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71 | |||
72 | |||
73 | movl r8=(VRN_KERNEL<<VRN_SHIFT) |
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74 | mov cr.ifa=r8 |
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75 | movl r10=(KERNEL_PAGE_WIDTH<<PS_SHIFT) |
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76 | mov cr.itir=r10 |
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77 | movl r10=(KERNEL_TRANSLATION_I) |
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78 | itr.i itr[r0]=r10 |
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79 | |||
80 | movl r10=(KERNEL_TRANSLATION_D) |
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81 | itr.d dtr[r0]=r10 |
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82 | |||
83 | |||
84 | |||
85 | |||
86 | |||
87 | |||
88 | |||
81 | jermar | 89 | # initialize PSR |
412 | jermar | 90 | mov psr.l = r0 |
91 | srlz.i |
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92 | srlz.d |
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869 | vana | 93 | movl r10=(PSR_DT_MASK|PSR_RT_MASK|PSR_IT_MASK|PSR_IC_MASK) /*Enable paging*/ |
94 | mov r9=psr |
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95 | or r10=r10,r9 |
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96 | mov cr.ipsr=r10 |
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97 | mov cr.ifs=r0 |
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98 | movl r8=paging_start |
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99 | mov cr.iip=r8 |
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473 | jermar | 100 | srlz.d |
869 | vana | 101 | srlz.i |
102 | .explicit |
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103 | {rfi;;} |
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104 | {nop 0;;} |
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105 | {nop 0;;} |
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106 | {nop 0;;} |
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107 | {nop 0;;} |
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108 | {nop 0;;} |
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109 | {nop 0;;} |
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110 | {nop 0;;} |
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111 | {nop 0;;} |
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112 | {nop 0;;} |
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113 | {nop 0;;} |
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114 | {nop 0;;} |
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115 | {nop 0;;} |
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116 | {nop 0;;} |
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117 | {nop 0;;} |
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118 | {nop 0;;} |
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119 | {nop 0;;} |
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120 | |||
121 | .global paging_start |
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122 | paging_start: |
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123 | |||
124 | .auto |
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81 | jermar | 125 | |
473 | jermar | 126 | # switch to register bank 1 |
127 | bsw.1 |
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128 | |||
74 | jermar | 129 | # initialize register stack |
81 | jermar | 130 | mov ar.rsc = r0 |
869 | vana | 131 | movl r8=(VRN_KERNEL<<VRN_SHIFT) |
132 | mov ar.bspstore = r8 |
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81 | jermar | 133 | loadrs |
36 | jermar | 134 | |
81 | jermar | 135 | .explicit |
74 | jermar | 136 | # initialize memory stack to some sane value |
872 | vana | 137 | movl r12 = stack0;; |
869 | vana | 138 | |
81 | jermar | 139 | add r12 = - 16, r12 /* allocate a scratch area on the stack */ |
60 | jermar | 140 | |
74 | jermar | 141 | # initialize gp (Global Pointer) register |
869 | vana | 142 | movl r1 = _hardcoded_load_address ;; |
143 | |||
106 | jermar | 144 | |
74 | jermar | 145 | |
60 | jermar | 146 | # |
147 | # Initialize hardcoded_* variables. |
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148 | # |
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106 | jermar | 149 | movl r14 = _hardcoded_ktext_size |
150 | movl r15 = _hardcoded_kdata_size |
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151 | movl r16 = _hardcoded_load_address |
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152 | addl r17 = @gprel(hardcoded_ktext_size), gp |
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153 | addl r18 = @gprel(hardcoded_kdata_size), gp |
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154 | addl r19 = @gprel(hardcoded_load_address), gp |
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155 | ;; |
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870 | vana | 156 | st8 [r17] = r14 |
157 | st8 [r18] = r15 |
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106 | jermar | 158 | st8 [r19] = r16 |
869 | vana | 159 | |
160 | |||
161 | .auto |
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37 | jermar | 162 | |
869 | vana | 163 | movl r18=main_bsp |
164 | mov b1=r18 |
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165 | br.call.sptk.many b0=b1 |
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51 | jermar | 166 | |
869 | vana | 167 | |
36 | jermar | 168 | 0: |
39 | jermar | 169 | br 0b |