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684 jermar 1
/*
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 * Copyright (C) 2006 Jakub Jermar
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 * Copyright (C) 2006 Jakub Vana
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 * All rights reserved.
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 *
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 * Redistribution and use in source and binary forms, with or without
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 * modification, are permitted provided that the following conditions
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 * are met:
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 *
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 * - Redistributions of source code must retain the above copyright
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 *   notice, this list of conditions and the following disclaimer.
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 * - Redistributions in binary form must reproduce the above copyright
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 *   notice, this list of conditions and the following disclaimer in the
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 *   documentation and/or other materials provided with the distribution.
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 * - The name of the author may not be used to endorse or promote products
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 *   derived from this software without specific prior written permission.
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 *
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 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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 */
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#include <arch/mm/page.h>
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#include <genarch/mm/page_ht.h>
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#include <mm/asid.h>
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#include <arch/mm/asid.h>
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#include <arch/mm/vhpt.h>
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#include <arch/types.h>
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#include <typedefs.h>
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#include <print.h>
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#include <mm/page.h>
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#include <mm/frame.h>
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#include <config.h>
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#include <panic.h>
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#include <arch/asm.h>
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#include <arch/barrier.h>
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#include <memstr.h>
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static void set_environment(void);
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/** Initialize ia64 virtual address translation subsystem. */
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void page_arch_init(void)
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{
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    page_mapping_operations = &ht_mapping_operations;
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    pk_disable();
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    set_environment();
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}
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/** Initialize VHPT and region registers. */
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void set_environment(void)
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{
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    region_register rr;
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    pta_register pta;  
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    int i;
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#ifdef CONFIG_VHPT  
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    __address vhpt_base;
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#endif
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    /*
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     * First set up kernel region register.
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     * This is redundant (see start.S) but we keep it here just for sure.
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     */
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    rr.word = rr_read(VRN_KERNEL);
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    rr.map.ve = 0;                  /* disable VHPT walker */
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    rr.map.ps = PAGE_WIDTH;
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    rr.map.rid = ASID2RID(ASID_KERNEL, VRN_KERNEL);
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    rr_write(VRN_KERNEL, rr.word);
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    srlz_i();
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    srlz_d();
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    /*
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     * And setup the rest of region register.
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     */
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    for(i = 0; i < REGION_REGISTERS; i++) {
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        /* skip kernel rr */
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        if (i == VRN_KERNEL)
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            continue;
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        rr.word = rr_read(i);
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        rr.map.ve = 0;      /* disable VHPT walker */
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        rr.map.rid = RID_KERNEL;
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        rr.map.ps = PAGE_WIDTH;
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        rr_write(i, rr.word);
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        srlz_i();
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        srlz_d();
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    }
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#ifdef CONFIG_VHPT  
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    vhpt_base = vhpt_set_up();
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#endif
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    /*
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     * Set up PTA register.
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     */
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    pta.word = pta_read();
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#ifndef CONFIG_VHPT
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    pta.map.ve = 0;                   /* disable VHPT walker */
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    pta.map.base = 0 >> PTA_BASE_SHIFT;
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#else
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    pta.map.ve = 1;                   /* enable VHPT walker */
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    pta.map.base = vhpt_base >> PTA_BASE_SHIFT;
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#endif
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    pta.map.vf = 1;                   /* large entry format */
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    pta.map.size = VHPT_WIDTH;
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    pta_write(pta.word);
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    srlz_i();
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    srlz_d();
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}
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/** Calculate address of collision chain from VPN and ASID.
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 *
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 * Interrupts must be disabled.
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 *
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 * @param page Address of virtual page including VRN bits.
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 * @param asid Address space identifier.
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 *
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 * @return VHPT entry address.
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 */
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vhpt_entry_t *vhpt_hash(__address page, asid_t asid)
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{
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    region_register rr_save, rr;
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    index_t vrn;
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    rid_t rid;
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    vhpt_entry_t *v;
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    vrn = page >> VRN_SHIFT;
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    rid = ASID2RID(asid, vrn);
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    rr_save.word = rr_read(vrn);
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    if (rr_save.map.rid == rid) {
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        /*
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         * The RID is already in place, compute thash and return.
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         */
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        v = (vhpt_entry_t *) thash(page);
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        return v;
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    }
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    /*
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     * The RID must be written to some region register.
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     * To speed things up, register indexed by vrn is used.
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     */
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    rr.word = rr_save.word;
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    rr.map.rid = rid;
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    rr_write(vrn, rr.word);
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    srlz_i();
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    v = (vhpt_entry_t *) thash(page);
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    rr_write(vrn, rr_save.word);
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    srlz_i();
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    srlz_d();
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    return v;
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}
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/** Compare ASID and VPN against PTE.
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 *
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 * Interrupts must be disabled.
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 *
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 * @param page Address of virtual page including VRN bits.
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 * @param asid Address space identifier.
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 *
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 * @return True if page and asid match the page and asid of t, false otherwise.
168
 */
792 jermar 169
bool vhpt_compare(__address page, asid_t asid, vhpt_entry_t *v)
749 jermar 170
{
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    region_register rr_save, rr;   
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    index_t vrn;
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    rid_t rid;
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    bool match;
175
 
792 jermar 176
    ASSERT(v);
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    vrn = page >> VRN_SHIFT;
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    rid = ASID2RID(asid, vrn);
180
 
181
    rr_save.word = rr_read(vrn);
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    if (rr_save.map.rid == rid) {
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        /*
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         * The RID is already in place, compare ttag with t and return.
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         */
792 jermar 186
        return ttag(page) == v->present.tag.tag_word;
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    }
188
 
189
    /*
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     * The RID must be written to some region register.
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     * To speed things up, register indexed by vrn is used.
192
     */
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    rr.word = rr_save.word;
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    rr.map.rid = rid;
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    rr_write(vrn, rr.word);
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    srlz_i();
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    match = (ttag(page) == v->present.tag.tag_word);
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    rr_write(vrn, rr_save.word);
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    srlz_i();
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    srlz_d();
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202
    return match;      
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}
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/** Set up one VHPT entry.
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 *
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 * @param t VHPT entry to be set up.
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 * @param page Virtual address of the page mapped by the entry.
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 * @param asid Address space identifier of the address space to which page belongs.
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 * @param frame Physical address of the frame to wich page is mapped.
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 * @param flags Different flags for the mapping.
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 */
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void vhpt_set_record(vhpt_entry_t *v, __address page, asid_t asid, __address frame, int flags)
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{
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    region_register rr_save, rr;   
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    index_t vrn;
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    rid_t rid;
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    __u64 tag;
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792 jermar 220
    ASSERT(v);
749 jermar 221
 
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    vrn = page >> VRN_SHIFT;
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    rid = ASID2RID(asid, vrn);
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225
    /*
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     * Compute ttag.
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     */
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    rr_save.word = rr_read(vrn);
229
    rr.word = rr_save.word;
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    rr.map.rid = rid;
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    rr_write(vrn, rr.word);
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    srlz_i();
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    tag = ttag(page);
234
    rr_write(vrn, rr_save.word);
235
    srlz_i();
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    srlz_d();
237
 
238
    /*
239
     * Clear the entry.
240
     */
792 jermar 241
    v->word[0] = 0;
242
    v->word[1] = 0;
243
    v->word[2] = 0;
244
    v->word[3] = 0;
749 jermar 245
 
792 jermar 246
    v->present.p = true;
247
    v->present.ma = (flags & PAGE_CACHEABLE) ? MA_WRITEBACK : MA_UNCACHEABLE;
248
    v->present.a = false;   /* not accessed */
249
    v->present.d = false;   /* not dirty */
250
    v->present.pl = (flags & PAGE_USER) ? PL_USER : PL_KERNEL;
251
    v->present.ar = (flags & PAGE_WRITE) ? AR_WRITE : AR_READ;
252
    v->present.ar |= (flags & PAGE_EXEC) ? AR_EXECUTE : 0;
253
    v->present.ppn = frame >> PPN_SHIFT;
254
    v->present.ed = false;  /* exception not deffered */
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    v->present.ps = PAGE_WIDTH;
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    v->present.key = 0;
257
    v->present.tag.tag_word = tag;
749 jermar 258
}