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| Rev | Author | Line No. | Line |
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| 59 | jermar | 1 | # |
| 2 | # Copyright (C) 2005 Jakub Jermar |
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| 3 | # All rights reserved. |
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| 4 | # |
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| 5 | # Redistribution and use in source and binary forms, with or without |
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| 6 | # modification, are permitted provided that the following conditions |
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| 7 | # are met: |
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| 8 | # |
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| 9 | # - Redistributions of source code must retain the above copyright |
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| 10 | # notice, this list of conditions and the following disclaimer. |
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| 11 | # - Redistributions in binary form must reproduce the above copyright |
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| 12 | # notice, this list of conditions and the following disclaimer in the |
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| 13 | # documentation and/or other materials provided with the distribution. |
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| 14 | # - The name of the author may not be used to endorse or promote products |
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| 15 | # derived from this software without specific prior written permission. |
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| 16 | # |
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| 17 | # THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
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| 18 | # IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
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| 19 | # OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
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| 20 | # IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
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| 21 | # INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
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| 22 | # NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
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| 23 | # DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
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| 24 | # THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
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| 25 | # (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
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| 26 | # THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
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| 27 | # |
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| 28 | |||
| 919 | jermar | 29 | #include <arch/register.h> |
| 30 | |||
| 59 | jermar | 31 | .text |
| 32 | |||
| 33 | .global memcpy |
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| 34 | memcpy: |
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| 205 | jermar | 35 | br _memcpy |
| 81 | jermar | 36 | |
| 102 | jermar | 37 | .global memsetb |
| 38 | memsetb: |
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| 39 | br _memsetb |
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| 40 | |||
| 41 | .global cpu_halt |
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| 42 | cpu_halt: |
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| 43 | br cpu_halt |
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| 44 | |||
| 45 | .global panic_printf |
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| 46 | panic_printf: |
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| 47 | { |
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| 48 | br.call.sptk.many b0=printf |
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| 49 | } |
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| 736 | jermar | 50 | br halt |
| 919 | jermar | 51 | |
| 52 | /** Switch to userspace - low level code. |
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| 53 | * |
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| 54 | * @param in0 Userspace entry point address. |
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| 55 | * @param in1 Userspace stack pointer address. |
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| 56 | * @param in2 Userspace register stack pointer address. |
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| 1078 | jermar | 57 | * @param in3 Userspace address of thread uspace_arg_t structure. |
| 58 | * @param in4 Value to be stored in IPSR. |
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| 59 | * @param in5 Value to be stored in RSC. |
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| 919 | jermar | 60 | */ |
| 61 | .global switch_to_userspace |
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| 62 | switch_to_userspace: |
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| 1078 | jermar | 63 | alloc loc0 = ar.pfs, 6, 3, 0, 0 |
| 993 | jermar | 64 | rsm (PSR_IC_MASK | PSR_I_MASK) /* disable interruption collection and interrupts */ |
| 919 | jermar | 65 | srlz.d ;; |
| 66 | srlz.i ;; |
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| 67 | |||
| 1078 | jermar | 68 | mov cr.ipsr = in4 |
| 919 | jermar | 69 | mov cr.iip = in0 |
| 70 | mov r12 = in1 |
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| 71 | |||
| 72 | xor r1 = r1, r1 |
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| 73 | |||
| 74 | mov loc1 = cr.ifs |
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| 75 | movl loc2 = PFM_MASK ;; |
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| 76 | and loc1 = loc2, loc1 ;; |
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| 77 | mov cr.ifs = loc1 ;; /* prevent decrementing BSP by rfi */ |
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| 78 | |||
| 79 | invala |
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| 80 | |||
| 81 | mov loc1 = ar.rsc ;; |
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| 82 | and loc1 = ~3, loc1 ;; |
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| 83 | mov ar.rsc = loc1 ;; /* put RSE into enforced lazy mode */ |
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| 84 | |||
| 85 | flushrs ;; |
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| 86 | |||
| 87 | mov ar.bspstore = in2 ;; |
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| 1078 | jermar | 88 | mov ar.rsc = in5 ;; |
| 919 | jermar | 89 | |
| 1078 | jermar | 90 | mov r8 = in3 |
| 91 | |||
| 919 | jermar | 92 | rfi ;; |