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| Rev | Author | Line No. | Line |
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| 1 | jermar | 1 | /* |
| 2 | * Copyright (C) 2001-2004 Jakub Jermar |
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| 3 | * All rights reserved. |
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| 4 | * |
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| 5 | * Redistribution and use in source and binary forms, with or without |
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| 6 | * modification, are permitted provided that the following conditions |
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| 7 | * are met: |
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| 8 | * |
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| 9 | * - Redistributions of source code must retain the above copyright |
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| 10 | * notice, this list of conditions and the following disclaimer. |
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| 11 | * - Redistributions in binary form must reproduce the above copyright |
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| 12 | * notice, this list of conditions and the following disclaimer in the |
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| 13 | * documentation and/or other materials provided with the distribution. |
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| 14 | * - The name of the author may not be used to endorse or promote products |
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| 15 | * derived from this software without specific prior written permission. |
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| 16 | * |
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| 17 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
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| 18 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
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| 19 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
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| 20 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
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| 21 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
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| 22 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
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| 23 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
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| 24 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
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| 25 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
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| 26 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
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| 27 | */ |
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| 28 | |||
| 29 | #include <arch/cpu.h> |
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| 30 | #include <arch/cpuid.h> |
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| 31 | #include <arch/pm.h> |
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| 32 | |||
| 33 | #include <arch.h> |
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| 34 | #include <arch/types.h> |
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| 35 | #include <print.h> |
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| 36 | #include <typedefs.h> |
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| 391 | jermar | 37 | #include <fpu_context.h> |
| 1 | jermar | 38 | |
| 16 | jermar | 39 | #include <arch/smp/apic.h> |
| 40 | |||
| 1 | jermar | 41 | /* |
| 42 | * Identification of CPUs. |
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| 43 | * Contains only non-MP-Specification specific SMP code. |
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| 44 | */ |
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| 45 | #define AMD_CPUID_EBX 0x68747541 |
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| 46 | #define AMD_CPUID_ECX 0x444d4163 |
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| 47 | #define AMD_CPUID_EDX 0x69746e65 |
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| 48 | |||
| 49 | #define INTEL_CPUID_EBX 0x756e6547 |
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| 50 | #define INTEL_CPUID_ECX 0x6c65746e |
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| 51 | #define INTEL_CPUID_EDX 0x49656e69 |
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| 52 | |||
| 141 | vana | 53 | |
| 1 | jermar | 54 | enum vendor { |
| 55 | VendorUnknown=0, |
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| 56 | VendorAMD, |
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| 57 | VendorIntel |
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| 58 | }; |
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| 59 | |||
| 60 | static char *vendor_str[] = { |
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| 61 | "Unknown Vendor", |
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| 62 | "AuthenticAMD", |
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| 63 | "GenuineIntel" |
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| 64 | }; |
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| 65 | |||
| 309 | palkovsky | 66 | void fpu_disable(void) |
| 58 | vana | 67 | { |
| 309 | palkovsky | 68 | __asm__ volatile ( |
| 58 | vana | 69 | "mov %%cr0,%%eax;" |
| 70 | "or $8,%%eax;" |
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| 71 | "mov %%eax,%%cr0;" |
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| 72 | : |
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| 73 | : |
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| 74 | :"%eax" |
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| 75 | ); |
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| 76 | } |
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| 77 | |||
| 309 | palkovsky | 78 | void fpu_enable(void) |
| 58 | vana | 79 | { |
| 309 | palkovsky | 80 | __asm__ volatile ( |
| 58 | vana | 81 | "mov %%cr0,%%eax;" |
| 82 | "and $0xffFFffF7,%%eax;" |
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| 83 | "mov %%eax,%%cr0;" |
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| 84 | : |
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| 85 | : |
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| 86 | :"%eax" |
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| 87 | ); |
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| 88 | } |
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| 89 | |||
| 1 | jermar | 90 | void cpu_arch_init(void) |
| 91 | { |
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| 1187 | jermar | 92 | cpuid_feature_info fi; |
| 93 | cpuid_extended_feature_info efi; |
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| 94 | cpu_info_t info; |
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| 95 | __u32 help = 0; |
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| 1019 | vana | 96 | |
| 15 | jermar | 97 | CPU->arch.tss = tss_p; |
| 1187 | jermar | 98 | CPU->arch.tss->iomap_base = &CPU->arch.tss->iomap[0] - ((__u8 *) CPU->arch.tss); |
| 1019 | vana | 99 | |
| 1187 | jermar | 100 | CPU->fpu_owner = NULL; |
| 1019 | vana | 101 | |
| 102 | cpuid(1, &info); |
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| 103 | |||
| 1187 | jermar | 104 | fi.word = info.cpuid_edx; |
| 105 | efi.word = info.cpuid_ecx; |
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| 1019 | vana | 106 | |
| 1187 | jermar | 107 | if (fi.bits.fxsr) |
| 108 | fpu_fxsr(); |
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| 109 | else |
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| 110 | fpu_fsr(); |
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| 1019 | vana | 111 | |
| 1187 | jermar | 112 | if (fi.bits.sse) { |
| 113 | asm volatile ( |
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| 114 | "mov %%cr4,%0\n" |
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| 115 | "or %1,%0\n" |
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| 116 | "mov %0,%%cr4\n" |
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| 117 | : "+r" (help) |
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| 118 | : "i" (CR4_OSFXSR_MASK|(1<<10)) |
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| 119 | ); |
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| 120 | } |
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| 1 | jermar | 121 | } |
| 122 | |||
| 123 | void cpu_identify(void) |
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| 124 | { |
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| 125 | cpu_info_t info; |
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| 126 | |||
| 15 | jermar | 127 | CPU->arch.vendor = VendorUnknown; |
| 1 | jermar | 128 | if (has_cpuid()) { |
| 129 | cpuid(0, &info); |
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| 130 | |||
| 131 | /* |
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| 132 | * Check for AMD processor. |
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| 133 | */ |
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| 125 | jermar | 134 | if (info.cpuid_ebx==AMD_CPUID_EBX && info.cpuid_ecx==AMD_CPUID_ECX && info.cpuid_edx==AMD_CPUID_EDX) { |
| 15 | jermar | 135 | CPU->arch.vendor = VendorAMD; |
| 1 | jermar | 136 | } |
| 137 | |||
| 138 | /* |
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| 139 | * Check for Intel processor. |
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| 140 | */ |
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| 125 | jermar | 141 | if (info.cpuid_ebx==INTEL_CPUID_EBX && info.cpuid_ecx==INTEL_CPUID_ECX && info.cpuid_edx==INTEL_CPUID_EDX) { |
| 15 | jermar | 142 | CPU->arch.vendor = VendorIntel; |
| 1 | jermar | 143 | } |
| 144 | |||
| 145 | cpuid(1, &info); |
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| 15 | jermar | 146 | CPU->arch.family = (info.cpuid_eax>>8)&0xf; |
| 147 | CPU->arch.model = (info.cpuid_eax>>4)&0xf; |
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| 148 | CPU->arch.stepping = (info.cpuid_eax>>0)&0xf; |
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| 1 | jermar | 149 | } |
| 150 | } |
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| 151 | |||
| 22 | jermar | 152 | void cpu_print_report(cpu_t* m) |
| 1 | jermar | 153 | { |
| 154 | printf("cpu%d: (%s family=%d model=%d stepping=%d) %dMHz\n", |
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| 155 | m->id, vendor_str[m->arch.vendor], m->arch.family, m->arch.model, m->arch.stepping, |
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| 156 | m->frequency_mhz); |
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| 157 | } |