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| Rev | Author | Line No. | Line |
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| 1896 | jermar | 1 | /* |
| 2071 | jermar | 2 | * Copyright (c) 2006 Jakub Jermar |
| 1896 | jermar | 3 | * All rights reserved. |
| 4 | * |
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| 5 | * Redistribution and use in source and binary forms, with or without |
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| 6 | * modification, are permitted provided that the following conditions |
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| 7 | * are met: |
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| 8 | * |
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| 9 | * - Redistributions of source code must retain the above copyright |
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| 10 | * notice, this list of conditions and the following disclaimer. |
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| 11 | * - Redistributions in binary form must reproduce the above copyright |
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| 12 | * notice, this list of conditions and the following disclaimer in the |
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| 13 | * documentation and/or other materials provided with the distribution. |
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| 14 | * - The name of the author may not be used to endorse or promote products |
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| 15 | * derived from this software without specific prior written permission. |
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| 16 | * |
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| 17 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
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| 18 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
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| 19 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
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| 20 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
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| 21 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
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| 22 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
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| 23 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
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| 24 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
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| 25 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
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| 26 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
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| 27 | */ |
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| 28 | |||
| 29 | /** @addtogroup ofw |
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| 30 | * @{ |
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| 31 | */ |
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| 32 | /** |
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| 33 | * @file |
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| 34 | * @brief EBUS 'reg' and 'ranges' properties handling. |
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| 35 | * |
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| 36 | */ |
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| 37 | |||
| 38 | #include <genarch/ofw/ofw_tree.h> |
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| 39 | #include <arch/memstr.h> |
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| 1911 | jermar | 40 | #include <arch/trap/interrupt.h> |
| 1896 | jermar | 41 | #include <func.h> |
| 42 | #include <panic.h> |
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| 1909 | jermar | 43 | #include <debug.h> |
| 1896 | jermar | 44 | #include <macros.h> |
| 45 | |||
| 1911 | jermar | 46 | /** Apply EBUS ranges to EBUS register. */ |
| 1896 | jermar | 47 | bool ofw_ebus_apply_ranges(ofw_tree_node_t *node, ofw_ebus_reg_t *reg, uintptr_t *pa) |
| 48 | { |
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| 49 | ofw_tree_property_t *prop; |
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| 50 | ofw_ebus_range_t *range; |
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| 51 | count_t ranges; |
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| 52 | |||
| 53 | prop = ofw_tree_getprop(node, "ranges"); |
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| 54 | if (!prop) |
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| 55 | return false; |
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| 56 | |||
| 57 | ranges = prop->size / sizeof(ofw_ebus_range_t); |
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| 58 | range = prop->value; |
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| 59 | |||
| 2745 | decky | 60 | unsigned int i; |
| 1896 | jermar | 61 | |
| 62 | for (i = 0; i < ranges; i++) { |
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| 63 | if (reg->space != range[i].child_space) |
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| 64 | continue; |
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| 65 | if (overlaps(reg->addr, reg->size, range[i].child_base, range[i].size)) { |
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| 66 | ofw_pci_reg_t pci_reg; |
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| 67 | |||
| 68 | pci_reg.space = range[i].parent_space; |
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| 69 | pci_reg.addr = range[i].parent_base + (reg->addr - range[i].child_base); |
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| 70 | pci_reg.size = reg->size; |
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| 71 | |||
| 72 | return ofw_pci_apply_ranges(node->parent, &pci_reg, pa); |
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| 73 | } |
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| 74 | } |
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| 75 | |||
| 76 | return false; |
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| 77 | } |
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| 78 | |||
| 1912 | jermar | 79 | bool ofw_ebus_map_interrupt(ofw_tree_node_t *node, ofw_ebus_reg_t *reg, uint32_t interrupt, int *inr) |
| 1909 | jermar | 80 | { |
| 81 | ofw_tree_property_t *prop; |
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| 82 | ofw_tree_node_t *controller; |
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| 83 | |||
| 84 | prop = ofw_tree_getprop(node, "interrupt-map"); |
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| 85 | if (!prop || !prop->value) |
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| 86 | return false; |
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| 87 | |||
| 88 | ofw_ebus_intr_map_t *intr_map = prop->value; |
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| 89 | count_t count = prop->size / sizeof(ofw_ebus_intr_map_t); |
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| 90 | |||
| 91 | ASSERT(count); |
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| 92 | |||
| 93 | prop = ofw_tree_getprop(node, "interrupt-map-mask"); |
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| 94 | if (!prop || !prop->value) |
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| 95 | return false; |
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| 96 | |||
| 97 | ofw_ebus_intr_mask_t *intr_mask = prop->value; |
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| 98 | |||
| 99 | ASSERT(prop->size == sizeof(ofw_ebus_intr_mask_t)); |
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| 100 | |||
| 101 | uint32_t space = reg->space & intr_mask->space_mask; |
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| 102 | uint32_t addr = reg->addr & intr_mask->addr_mask; |
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| 103 | uint32_t intr = interrupt & intr_mask->intr_mask; |
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| 104 | |||
| 2745 | decky | 105 | unsigned int i; |
| 1909 | jermar | 106 | for (i = 0; i < count; i++) { |
| 107 | if ((intr_map[i].space == space) && (intr_map[i].addr == addr) |
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| 108 | && (intr_map[i].intr == intr)) |
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| 109 | goto found; |
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| 110 | } |
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| 111 | return false; |
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| 112 | |||
| 113 | found: |
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| 114 | /* |
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| 115 | * We found the device that functions as an interrupt controller |
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| 1912 | jermar | 116 | * for the interrupt. We also found partial mapping from interrupt to INO. |
| 1909 | jermar | 117 | */ |
| 118 | |||
| 119 | controller = ofw_tree_find_node_by_handle(ofw_tree_lookup("/"), intr_map[i].controller_handle); |
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| 1911 | jermar | 120 | if (!controller) |
| 121 | return false; |
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| 122 | |||
| 123 | if (strcmp(ofw_tree_node_name(controller), "pci") != 0) { |
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| 124 | /* |
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| 125 | * This is not a PCI node. |
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| 126 | */ |
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| 127 | return false; |
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| 128 | } |
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| 129 | |||
| 1912 | jermar | 130 | /* |
| 131 | * Let the PCI do the next step in mapping the interrupt. |
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| 132 | */ |
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| 133 | if (!ofw_pci_map_interrupt(controller, NULL, intr_map[i].controller_ino, inr)) |
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| 134 | return false; |
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| 1911 | jermar | 135 | |
| 1909 | jermar | 136 | return true; |
| 137 | } |
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| 138 | |||
| 1896 | jermar | 139 | /** @} |
| 140 | */ |