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| Rev | Author | Line No. | Line |
|---|---|---|---|
| 4638 | rimsky | 1 | /* |
| 2 | * Copyright (c) 2005 Jakub Jermar |
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| 3 | * All rights reserved. |
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| 4 | * |
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| 5 | * Redistribution and use in source and binary forms, with or without |
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| 6 | * modification, are permitted provided that the following conditions |
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| 7 | * are met: |
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| 8 | * |
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| 9 | * - Redistributions of source code must retain the above copyright |
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| 10 | * notice, this list of conditions and the following disclaimer. |
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| 11 | * - Redistributions in binary form must reproduce the above copyright |
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| 12 | * notice, this list of conditions and the following disclaimer in the |
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| 13 | * documentation and/or other materials provided with the distribution. |
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| 14 | * - The name of the author may not be used to endorse or promote products |
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| 15 | * derived from this software without specific prior written permission. |
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| 16 | * |
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| 17 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
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| 18 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
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| 19 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
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| 20 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
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| 21 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
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| 22 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
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| 23 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
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| 24 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
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| 25 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
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| 26 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
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| 27 | */ |
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| 28 | |||
| 29 | /** @addtogroup sparc64interrupt |
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| 30 | * @{ |
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| 31 | */ |
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| 32 | /** |
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| 33 | * @file |
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| 34 | * @brief This file contains interrupt vector trap handler. |
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| 35 | */ |
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| 36 | |||
| 37 | #ifndef KERN_sparc64_TRAP_SUN4U_INTERRUPT_H_ |
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| 38 | #define KERN_sparc64_TRAP_SUN4U_INTERRUPT_H_ |
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| 39 | |||
| 40 | #include <arch/trap/trap_table.h> |
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| 41 | #include <arch/stack.h> |
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| 42 | |||
| 43 | |||
| 44 | /* Interrupt ASI registers. */ |
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| 45 | #define ASI_INTR_W 0x77 |
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| 46 | #define ASI_INTR_DISPATCH_STATUS 0x48 |
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| 47 | #define ASI_INTR_R 0x7f |
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| 48 | #define ASI_INTR_RECEIVE 0x49 |
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| 49 | |||
| 50 | /* VA's used with ASI_INTR_W register. */ |
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| 51 | #if defined (US) |
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| 52 | #define ASI_UDB_INTR_W_DATA_0 0x40 |
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| 53 | #define ASI_UDB_INTR_W_DATA_1 0x50 |
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| 54 | #define ASI_UDB_INTR_W_DATA_2 0x60 |
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| 55 | #elif defined (US3) |
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| 56 | #define VA_INTR_W_DATA_0 0x40 |
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| 57 | #define VA_INTR_W_DATA_1 0x48 |
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| 58 | #define VA_INTR_W_DATA_2 0x50 |
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| 59 | #define VA_INTR_W_DATA_3 0x58 |
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| 60 | #define VA_INTR_W_DATA_4 0x60 |
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| 61 | #define VA_INTR_W_DATA_5 0x68 |
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| 62 | #define VA_INTR_W_DATA_6 0x80 |
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| 63 | #define VA_INTR_W_DATA_7 0x88 |
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| 64 | #endif |
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| 65 | #define VA_INTR_W_DISPATCH 0x70 |
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| 66 | |||
| 67 | /* VA's used with ASI_INTR_R register. */ |
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| 68 | #if defined(US) |
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| 69 | #define ASI_UDB_INTR_R_DATA_0 0x40 |
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| 70 | #define ASI_UDB_INTR_R_DATA_1 0x50 |
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| 71 | #define ASI_UDB_INTR_R_DATA_2 0x60 |
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| 72 | #elif defined (US3) |
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| 73 | #define VA_INTR_R_DATA_0 0x40 |
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| 74 | #define VA_INTR_R_DATA_1 0x48 |
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| 75 | #define VA_INTR_R_DATA_2 0x50 |
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| 76 | #define VA_INTR_R_DATA_3 0x58 |
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| 77 | #define VA_INTR_R_DATA_4 0x60 |
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| 78 | #define VA_INTR_R_DATA_5 0x68 |
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| 79 | #define VA_INTR_R_DATA_6 0x80 |
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| 80 | #define VA_INTR_R_DATA_7 0x88 |
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| 81 | #endif |
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| 82 | |||
| 83 | /* Shifts in the Interrupt Vector Dispatch virtual address. */ |
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| 84 | #define INTR_VEC_DISPATCH_MID_SHIFT 14 |
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| 85 | |||
| 86 | /* Bits in the Interrupt Dispatch Status register. */ |
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| 87 | #define INTR_DISPATCH_STATUS_NACK 0x2 |
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| 88 | #define INTR_DISPATCH_STATUS_BUSY 0x1 |
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| 89 | |||
| 90 | #define TT_INTERRUPT_VECTOR_TRAP 0x60 |
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| 91 | |||
| 92 | #define INTERRUPT_VECTOR_TRAP_HANDLER_SIZE TRAP_TABLE_ENTRY_SIZE |
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| 93 | |||
| 94 | #ifdef __ASM__ |
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| 95 | .macro INTERRUPT_VECTOR_TRAP_HANDLER |
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| 96 | PREEMPTIBLE_HANDLER interrupt |
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| 97 | .endm |
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| 98 | #endif /* __ASM__ */ |
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| 99 | |||
| 100 | |||
| 101 | #endif |
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| 102 | |||
| 103 | /** @} |
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| 104 | */ |