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Rev | Author | Line No. | Line |
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1809 | decky | 1 | /* |
2071 | jermar | 2 | * Copyright (c) 2001-2005 Jakub Jermar |
1809 | decky | 3 | * All rights reserved. |
4 | * |
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5 | * Redistribution and use in source and binary forms, with or without |
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6 | * modification, are permitted provided that the following conditions |
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7 | * are met: |
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8 | * |
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9 | * - Redistributions of source code must retain the above copyright |
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10 | * notice, this list of conditions and the following disclaimer. |
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11 | * - Redistributions in binary form must reproduce the above copyright |
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12 | * notice, this list of conditions and the following disclaimer in the |
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13 | * documentation and/or other materials provided with the distribution. |
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14 | * - The name of the author may not be used to endorse or promote products |
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15 | * derived from this software without specific prior written permission. |
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16 | * |
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17 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
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18 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
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19 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
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20 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
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21 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
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22 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
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23 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
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24 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
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25 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
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26 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
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27 | */ |
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28 | |||
1952 | jermar | 29 | /** @addtogroup ia32xen |
1809 | decky | 30 | * @{ |
31 | */ |
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32 | /** @file |
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33 | */ |
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34 | |||
35 | #ifdef CONFIG_SMP |
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36 | |||
37 | #include <config.h> |
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38 | #include <print.h> |
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39 | #include <debug.h> |
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40 | #include <arch/smp/mps.h> |
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41 | #include <arch/smp/apic.h> |
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42 | #include <arch/smp/smp.h> |
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43 | #include <func.h> |
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44 | #include <arch/types.h> |
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45 | #include <cpu.h> |
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46 | #include <arch/asm.h> |
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47 | #include <arch/bios/bios.h> |
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48 | #include <mm/frame.h> |
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49 | |||
50 | /* |
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51 | * MultiProcessor Specification detection code. |
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52 | */ |
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53 | |||
54 | #define FS_SIGNATURE 0x5f504d5f |
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55 | #define CT_SIGNATURE 0x504d4350 |
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56 | |||
57 | int mps_fs_check(uint8_t *base); |
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58 | int mps_ct_check(void); |
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59 | |||
60 | int configure_via_ct(void); |
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61 | int configure_via_default(uint8_t n); |
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62 | |||
63 | int ct_processor_entry(struct __processor_entry *pr); |
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64 | void ct_bus_entry(struct __bus_entry *bus); |
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65 | void ct_io_apic_entry(struct __io_apic_entry *ioa); |
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66 | void ct_io_intr_entry(struct __io_intr_entry *iointr); |
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67 | void ct_l_intr_entry(struct __l_intr_entry *lintr); |
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68 | |||
69 | void ct_extended_entries(void); |
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70 | |||
71 | static struct mps_fs *fs; |
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72 | static struct mps_ct *ct; |
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73 | |||
74 | struct __processor_entry *processor_entries = NULL; |
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75 | struct __bus_entry *bus_entries = NULL; |
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76 | struct __io_apic_entry *io_apic_entries = NULL; |
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77 | struct __io_intr_entry *io_intr_entries = NULL; |
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78 | struct __l_intr_entry *l_intr_entries = NULL; |
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79 | |||
2745 | decky | 80 | unsigned int processor_entry_cnt = 0; |
81 | unsigned int bus_entry_cnt = 0; |
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82 | unsigned int io_apic_entry_cnt = 0; |
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83 | unsigned int io_intr_entry_cnt = 0; |
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84 | unsigned int l_intr_entry_cnt = 0; |
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1809 | decky | 85 | |
86 | waitq_t ap_completion_wq; |
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87 | |||
88 | /* |
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89 | * Implementation of IA-32 SMP configuration interface. |
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90 | */ |
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91 | static count_t get_cpu_count(void); |
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92 | static bool is_cpu_enabled(index_t i); |
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93 | static bool is_bsp(index_t i); |
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94 | static uint8_t get_cpu_apic_id(index_t i); |
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2101 | decky | 95 | static int mps_irq_to_pin(unsigned int irq); |
1809 | decky | 96 | |
97 | struct smp_config_operations mps_config_operations = { |
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98 | .cpu_count = get_cpu_count, |
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99 | .cpu_enabled = is_cpu_enabled, |
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100 | .cpu_bootstrap = is_bsp, |
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101 | .cpu_apic_id = get_cpu_apic_id, |
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102 | .irq_to_pin = mps_irq_to_pin |
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103 | }; |
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104 | |||
105 | count_t get_cpu_count(void) |
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106 | { |
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107 | return processor_entry_cnt; |
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108 | } |
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109 | |||
110 | bool is_cpu_enabled(index_t i) |
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111 | { |
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112 | ASSERT(i < processor_entry_cnt); |
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113 | return processor_entries[i].cpu_flags & 0x1; |
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114 | } |
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115 | |||
116 | bool is_bsp(index_t i) |
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117 | { |
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118 | ASSERT(i < processor_entry_cnt); |
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119 | return processor_entries[i].cpu_flags & 0x2; |
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120 | } |
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121 | |||
122 | uint8_t get_cpu_apic_id(index_t i) |
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123 | { |
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124 | ASSERT(i < processor_entry_cnt); |
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125 | return processor_entries[i].l_apic_id; |
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126 | } |
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127 | |||
128 | |||
129 | /* |
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130 | * Used to check the integrity of the MP Floating Structure. |
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131 | */ |
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132 | int mps_fs_check(uint8_t *base) |
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133 | { |
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134 | int i; |
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135 | uint8_t sum; |
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136 | |||
137 | for (i = 0, sum = 0; i < 16; i++) |
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138 | sum += base[i]; |
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139 | |||
140 | return !sum; |
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141 | } |
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142 | |||
143 | /* |
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144 | * Used to check the integrity of the MP Configuration Table. |
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145 | */ |
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146 | int mps_ct_check(void) |
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147 | { |
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148 | uint8_t *base = (uint8_t *) ct; |
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149 | uint8_t *ext = base + ct->base_table_length; |
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150 | uint8_t sum; |
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151 | int i; |
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152 | |||
153 | /* count the checksum for the base table */ |
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154 | for (i=0,sum=0; i < ct->base_table_length; i++) |
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155 | sum += base[i]; |
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156 | |||
157 | if (sum) |
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158 | return 0; |
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159 | |||
160 | /* count the checksum for the extended table */ |
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161 | for (i=0,sum=0; i < ct->ext_table_length; i++) |
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162 | sum += ext[i]; |
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163 | |||
164 | return sum == ct->ext_table_checksum; |
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165 | } |
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166 | |||
167 | void mps_init(void) |
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168 | { |
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169 | uint8_t *addr[2] = { NULL, (uint8_t *) PA2KA(0xf0000) }; |
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170 | int i, j, length[2] = { 1024, 64*1024 }; |
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171 | |||
172 | |||
173 | /* |
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174 | * Find MP Floating Pointer Structure |
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175 | * 1a. search first 1K of EBDA |
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176 | * 1b. if EBDA is undefined, search last 1K of base memory |
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177 | * 2. search 64K starting at 0xf0000 |
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178 | */ |
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179 | |||
180 | addr[0] = (uint8_t *) PA2KA(ebda ? ebda : 639 * 1024); |
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181 | for (i = 0; i < 2; i++) { |
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182 | for (j = 0; j < length[i]; j += 16) { |
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183 | if (*((uint32_t *) &addr[i][j]) == FS_SIGNATURE && mps_fs_check(&addr[i][j])) { |
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184 | fs = (struct mps_fs *) &addr[i][j]; |
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185 | goto fs_found; |
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186 | } |
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187 | } |
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188 | } |
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189 | |||
190 | return; |
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191 | |||
192 | fs_found: |
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193 | printf("%p: MPS Floating Pointer Structure\n", fs); |
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194 | |||
195 | if (fs->config_type == 0 && fs->configuration_table) { |
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196 | if (fs->mpfib2 >> 7) { |
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2462 | jermar | 197 | printf("%s: PIC mode not supported\n", __func__); |
1809 | decky | 198 | return; |
199 | } |
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200 | |||
201 | ct = (struct mps_ct *)PA2KA((uintptr_t)fs->configuration_table); |
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202 | config.cpu_count = configure_via_ct(); |
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203 | } |
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204 | else |
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205 | config.cpu_count = configure_via_default(fs->config_type); |
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206 | |||
207 | return; |
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208 | } |
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209 | |||
210 | int configure_via_ct(void) |
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211 | { |
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212 | uint8_t *cur; |
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213 | int i, cnt; |
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214 | |||
215 | if (ct->signature != CT_SIGNATURE) { |
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2462 | jermar | 216 | printf("%s: bad ct->signature\n", __func__); |
1809 | decky | 217 | return 1; |
218 | } |
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219 | if (!mps_ct_check()) { |
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2462 | jermar | 220 | printf("%s: bad ct checksum\n", __func__); |
1809 | decky | 221 | return 1; |
222 | } |
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223 | if (ct->oem_table) { |
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2462 | jermar | 224 | printf("%s: ct->oem_table not supported\n", __func__); |
1809 | decky | 225 | return 1; |
226 | } |
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227 | |||
228 | l_apic = (uint32_t *)(uintptr_t)ct->l_apic; |
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229 | |||
230 | cnt = 0; |
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231 | cur = &ct->base_table[0]; |
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232 | for (i=0; i < ct->entry_count; i++) { |
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233 | switch (*cur) { |
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234 | /* Processor entry */ |
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235 | case 0: |
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236 | processor_entries = processor_entries ? processor_entries : (struct __processor_entry *) cur; |
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237 | processor_entry_cnt++; |
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238 | cnt += ct_processor_entry((struct __processor_entry *) cur); |
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239 | cur += 20; |
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240 | break; |
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241 | |||
242 | /* Bus entry */ |
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243 | case 1: |
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244 | bus_entries = bus_entries ? bus_entries : (struct __bus_entry *) cur; |
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245 | bus_entry_cnt++; |
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246 | ct_bus_entry((struct __bus_entry *) cur); |
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247 | cur += 8; |
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248 | break; |
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249 | |||
250 | /* I/O Apic */ |
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251 | case 2: |
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252 | io_apic_entries = io_apic_entries ? io_apic_entries : (struct __io_apic_entry *) cur; |
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253 | io_apic_entry_cnt++; |
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254 | ct_io_apic_entry((struct __io_apic_entry *) cur); |
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255 | cur += 8; |
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256 | break; |
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257 | |||
258 | /* I/O Interrupt Assignment */ |
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259 | case 3: |
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260 | io_intr_entries = io_intr_entries ? io_intr_entries : (struct __io_intr_entry *) cur; |
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261 | io_intr_entry_cnt++; |
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262 | ct_io_intr_entry((struct __io_intr_entry *) cur); |
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263 | cur += 8; |
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264 | break; |
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265 | |||
266 | /* Local Interrupt Assignment */ |
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267 | case 4: |
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268 | l_intr_entries = l_intr_entries ? l_intr_entries : (struct __l_intr_entry *) cur; |
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269 | l_intr_entry_cnt++; |
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270 | ct_l_intr_entry((struct __l_intr_entry *) cur); |
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271 | cur += 8; |
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272 | break; |
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273 | |||
274 | default: |
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275 | /* |
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276 | * Something is wrong. Fallback to UP mode. |
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277 | */ |
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278 | |||
2462 | jermar | 279 | printf("%s: ct badness\n", __func__); |
1809 | decky | 280 | return 1; |
281 | } |
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282 | } |
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283 | |||
284 | /* |
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285 | * Process extended entries. |
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286 | */ |
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287 | ct_extended_entries(); |
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288 | return cnt; |
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289 | } |
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290 | |||
291 | int configure_via_default(uint8_t n) |
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292 | { |
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293 | /* |
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294 | * Not yet implemented. |
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295 | */ |
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2462 | jermar | 296 | printf("%s: not supported\n", __func__); |
1809 | decky | 297 | return 1; |
298 | } |
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299 | |||
300 | |||
301 | int ct_processor_entry(struct __processor_entry *pr) |
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302 | { |
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303 | /* |
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304 | * Ignore processors which are not marked enabled. |
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305 | */ |
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306 | if ((pr->cpu_flags & (1<<0)) == 0) |
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307 | return 0; |
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308 | |||
309 | apic_id_mask |= (1<<pr->l_apic_id); |
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310 | return 1; |
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311 | } |
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312 | |||
313 | void ct_bus_entry(struct __bus_entry *bus) |
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314 | { |
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315 | #ifdef MPSCT_VERBOSE |
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316 | char buf[7]; |
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317 | memcpy((void *) buf, (void *) bus->bus_type, 6); |
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318 | buf[6] = 0; |
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319 | printf("bus%d: %s\n", bus->bus_id, buf); |
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320 | #endif |
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321 | } |
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322 | |||
323 | void ct_io_apic_entry(struct __io_apic_entry *ioa) |
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324 | { |
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325 | static int io_apic_count = 0; |
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326 | |||
327 | /* this ioapic is marked unusable */ |
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328 | if ((ioa->io_apic_flags & 1) == 0) |
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329 | return; |
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330 | |||
331 | if (io_apic_count++ > 0) { |
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332 | /* |
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333 | * Multiple IO APIC's are currently not supported. |
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334 | */ |
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335 | return; |
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336 | } |
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337 | |||
338 | io_apic = (uint32_t *)(uintptr_t)ioa->io_apic; |
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339 | } |
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340 | |||
341 | //#define MPSCT_VERBOSE |
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342 | void ct_io_intr_entry(struct __io_intr_entry *iointr) |
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343 | { |
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344 | #ifdef MPSCT_VERBOSE |
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345 | switch (iointr->intr_type) { |
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346 | case 0: printf("INT"); break; |
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347 | case 1: printf("NMI"); break; |
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348 | case 2: printf("SMI"); break; |
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349 | case 3: printf("ExtINT"); break; |
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350 | } |
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351 | putchar(','); |
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352 | switch (iointr->poel&3) { |
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353 | case 0: printf("bus-like"); break; |
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354 | case 1: printf("active high"); break; |
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355 | case 2: printf("reserved"); break; |
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356 | case 3: printf("active low"); break; |
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357 | } |
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358 | putchar(','); |
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359 | switch ((iointr->poel>>2)&3) { |
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360 | case 0: printf("bus-like"); break; |
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361 | case 1: printf("edge-triggered"); break; |
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362 | case 2: printf("reserved"); break; |
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363 | case 3: printf("level-triggered"); break; |
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364 | } |
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365 | putchar(','); |
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366 | printf("bus%d,irq%d", iointr->src_bus_id, iointr->src_bus_irq); |
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367 | putchar(','); |
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368 | printf("io_apic%d,pin%d", iointr->dst_io_apic_id, iointr->dst_io_apic_pin); |
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369 | putchar('\n'); |
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370 | #endif |
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371 | } |
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372 | |||
373 | void ct_l_intr_entry(struct __l_intr_entry *lintr) |
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374 | { |
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375 | #ifdef MPSCT_VERBOSE |
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376 | switch (lintr->intr_type) { |
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377 | case 0: printf("INT"); break; |
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378 | case 1: printf("NMI"); break; |
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379 | case 2: printf("SMI"); break; |
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380 | case 3: printf("ExtINT"); break; |
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381 | } |
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382 | putchar(','); |
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383 | switch (lintr->poel&3) { |
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384 | case 0: printf("bus-like"); break; |
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385 | case 1: printf("active high"); break; |
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386 | case 2: printf("reserved"); break; |
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387 | case 3: printf("active low"); break; |
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388 | } |
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389 | putchar(','); |
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390 | switch ((lintr->poel>>2)&3) { |
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391 | case 0: printf("bus-like"); break; |
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392 | case 1: printf("edge-triggered"); break; |
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393 | case 2: printf("reserved"); break; |
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394 | case 3: printf("level-triggered"); break; |
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395 | } |
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396 | putchar(','); |
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397 | printf("bus%d,irq%d", lintr->src_bus_id, lintr->src_bus_irq); |
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398 | putchar(','); |
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399 | printf("l_apic%d,pin%d", lintr->dst_l_apic_id, lintr->dst_l_apic_pin); |
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400 | putchar('\n'); |
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401 | #endif |
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402 | } |
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403 | |||
404 | void ct_extended_entries(void) |
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405 | { |
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406 | uint8_t *ext = (uint8_t *) ct + ct->base_table_length; |
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407 | uint8_t *cur; |
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408 | |||
409 | for (cur = ext; cur < ext + ct->ext_table_length; cur += cur[CT_EXT_ENTRY_LEN]) { |
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410 | switch (cur[CT_EXT_ENTRY_TYPE]) { |
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411 | default: |
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412 | printf("%p: skipping MP Configuration Table extended entry type %d\n", cur, cur[CT_EXT_ENTRY_TYPE]); |
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413 | break; |
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414 | } |
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415 | } |
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416 | } |
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417 | |||
2101 | decky | 418 | int mps_irq_to_pin(unsigned int irq) |
1809 | decky | 419 | { |
2745 | decky | 420 | unsigned int i; |
1809 | decky | 421 | |
2101 | decky | 422 | for (i = 0; i < io_intr_entry_cnt; i++) { |
1809 | decky | 423 | if (io_intr_entries[i].src_bus_irq == irq && io_intr_entries[i].intr_type == 0) |
424 | return io_intr_entries[i].dst_io_apic_pin; |
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425 | } |
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426 | |||
427 | return -1; |
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428 | } |
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429 | |||
430 | #endif /* CONFIG_SMP */ |
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431 | |||
432 | /** @} |
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433 | */ |