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| Rev | Author | Line No. | Line |
|---|---|---|---|
| 1911 | jermar | 1 | /* |
| 2071 | jermar | 2 | * Copyright (c) 2006 Jakub Jermar |
| 1911 | jermar | 3 | * All rights reserved. |
| 4 | * |
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| 5 | * Redistribution and use in source and binary forms, with or without |
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| 6 | * modification, are permitted provided that the following conditions |
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| 7 | * are met: |
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| 8 | * |
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| 9 | * - Redistributions of source code must retain the above copyright |
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| 10 | * notice, this list of conditions and the following disclaimer. |
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| 11 | * - Redistributions in binary form must reproduce the above copyright |
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| 12 | * notice, this list of conditions and the following disclaimer in the |
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| 13 | * documentation and/or other materials provided with the distribution. |
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| 14 | * - The name of the author may not be used to endorse or promote products |
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| 15 | * derived from this software without specific prior written permission. |
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| 16 | * |
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| 17 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
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| 18 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
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| 19 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
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| 20 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
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| 21 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
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| 22 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
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| 23 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
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| 24 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
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| 25 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
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| 26 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
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| 27 | */ |
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| 28 | |||
| 29 | /** @addtogroup sparc64 |
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| 30 | * @{ |
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| 31 | */ |
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| 32 | /** |
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| 33 | * @file |
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| 34 | * @brief PCI driver. |
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| 35 | */ |
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| 36 | |||
| 37 | #include <arch/drivers/pci.h> |
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| 38 | #include <genarch/ofw/ofw_tree.h> |
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| 39 | #include <arch/trap/interrupt.h> |
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| 2089 | decky | 40 | #include <mm/page.h> |
| 1911 | jermar | 41 | #include <mm/slab.h> |
| 42 | #include <arch/types.h> |
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| 43 | #include <debug.h> |
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| 44 | #include <print.h> |
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| 45 | #include <func.h> |
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| 46 | #include <arch/asm.h> |
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| 47 | |||
| 48 | #define PCI_SABRE_REGS_REG 0 |
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| 49 | |||
| 50 | #define PCI_SABRE_IMAP_BASE 0x200 |
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| 51 | #define PCI_SABRE_ICLR_BASE 0x300 |
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| 52 | |||
| 1984 | jermar | 53 | #define PCI_PSYCHO_REGS_REG 2 |
| 54 | |||
| 55 | #define PCI_PSYCHO_IMAP_BASE 0x200 |
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| 56 | #define PCI_PSYCHO_ICLR_BASE 0x300 |
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| 57 | |||
| 1911 | jermar | 58 | static pci_t *pci_sabre_init(ofw_tree_node_t *node); |
| 59 | static void pci_sabre_enable_interrupt(pci_t *pci, int inr); |
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| 60 | static void pci_sabre_clear_interrupt(pci_t *pci, int inr); |
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| 61 | |||
| 1984 | jermar | 62 | static pci_t *pci_psycho_init(ofw_tree_node_t *node); |
| 63 | static void pci_psycho_enable_interrupt(pci_t *pci, int inr); |
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| 64 | static void pci_psycho_clear_interrupt(pci_t *pci, int inr); |
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| 65 | |||
| 1911 | jermar | 66 | /** PCI operations for Sabre model. */ |
| 67 | static pci_operations_t pci_sabre_ops = { |
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| 68 | .enable_interrupt = pci_sabre_enable_interrupt, |
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| 69 | .clear_interrupt = pci_sabre_clear_interrupt |
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| 70 | }; |
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| 1984 | jermar | 71 | /** PCI operations for Psycho model. */ |
| 72 | static pci_operations_t pci_psycho_ops = { |
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| 73 | .enable_interrupt = pci_psycho_enable_interrupt, |
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| 74 | .clear_interrupt = pci_psycho_clear_interrupt |
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| 75 | }; |
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| 1911 | jermar | 76 | |
| 1984 | jermar | 77 | /** Initialize PCI controller (model Sabre). |
| 78 | * |
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| 79 | * @param node OpenFirmware device tree node of the Sabre. |
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| 80 | * |
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| 81 | * @return Address of the initialized PCI structure. |
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| 82 | */ |
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| 1911 | jermar | 83 | pci_t *pci_sabre_init(ofw_tree_node_t *node) |
| 84 | { |
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| 85 | pci_t *pci; |
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| 86 | ofw_tree_property_t *prop; |
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| 87 | |||
| 88 | /* |
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| 89 | * Get registers. |
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| 90 | */ |
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| 91 | prop = ofw_tree_getprop(node, "reg"); |
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| 92 | if (!prop || !prop->value) |
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| 93 | return NULL; |
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| 94 | |||
| 95 | ofw_upa_reg_t *reg = prop->value; |
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| 96 | count_t regs = prop->size / sizeof(ofw_upa_reg_t); |
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| 97 | |||
| 98 | if (regs < PCI_SABRE_REGS_REG + 1) |
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| 99 | return NULL; |
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| 100 | |||
| 101 | uintptr_t paddr; |
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| 102 | if (!ofw_upa_apply_ranges(node->parent, ®[PCI_SABRE_REGS_REG], &paddr)) |
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| 103 | return NULL; |
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| 104 | |||
| 105 | pci = (pci_t *) malloc(sizeof(pci_t), FRAME_ATOMIC); |
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| 106 | if (!pci) |
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| 107 | return NULL; |
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| 108 | |||
| 109 | pci->model = PCI_SABRE; |
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| 110 | pci->op = &pci_sabre_ops; |
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| 111 | pci->reg = (uint64_t *) hw_map(paddr, reg[PCI_SABRE_REGS_REG].size); |
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| 112 | |||
| 113 | return pci; |
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| 114 | } |
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| 115 | |||
| 1984 | jermar | 116 | |
| 117 | /** Initialize the Psycho PCI controller. |
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| 118 | * |
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| 119 | * @param node OpenFirmware device tree node of the Psycho. |
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| 120 | * |
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| 121 | * @return Address of the initialized PCI structure. |
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| 122 | */ |
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| 123 | pci_t *pci_psycho_init(ofw_tree_node_t *node) |
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| 124 | { |
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| 125 | pci_t *pci; |
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| 126 | ofw_tree_property_t *prop; |
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| 127 | |||
| 128 | /* |
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| 129 | * Get registers. |
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| 130 | */ |
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| 131 | prop = ofw_tree_getprop(node, "reg"); |
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| 132 | if (!prop || !prop->value) |
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| 133 | return NULL; |
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| 134 | |||
| 135 | ofw_upa_reg_t *reg = prop->value; |
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| 136 | count_t regs = prop->size / sizeof(ofw_upa_reg_t); |
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| 137 | |||
| 138 | if (regs < PCI_PSYCHO_REGS_REG + 1) |
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| 139 | return NULL; |
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| 140 | |||
| 141 | uintptr_t paddr; |
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| 142 | if (!ofw_upa_apply_ranges(node->parent, ®[PCI_PSYCHO_REGS_REG], &paddr)) |
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| 143 | return NULL; |
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| 144 | |||
| 145 | pci = (pci_t *) malloc(sizeof(pci_t), FRAME_ATOMIC); |
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| 146 | if (!pci) |
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| 147 | return NULL; |
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| 148 | |||
| 149 | pci->model = PCI_PSYCHO; |
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| 150 | pci->op = &pci_psycho_ops; |
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| 151 | pci->reg = (uint64_t *) hw_map(paddr, reg[PCI_PSYCHO_REGS_REG].size); |
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| 152 | |||
| 153 | return pci; |
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| 154 | } |
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| 155 | |||
| 1911 | jermar | 156 | void pci_sabre_enable_interrupt(pci_t *pci, int inr) |
| 157 | { |
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| 158 | pci->reg[PCI_SABRE_IMAP_BASE + (inr & INO_MASK)] |= IMAP_V_MASK; |
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| 159 | } |
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| 160 | |||
| 161 | void pci_sabre_clear_interrupt(pci_t *pci, int inr) |
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| 162 | { |
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| 163 | pci->reg[PCI_SABRE_ICLR_BASE + (inr & INO_MASK)] = 0; |
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| 164 | } |
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| 165 | |||
| 1984 | jermar | 166 | void pci_psycho_enable_interrupt(pci_t *pci, int inr) |
| 167 | { |
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| 168 | pci->reg[PCI_PSYCHO_IMAP_BASE + (inr & INO_MASK)] |= IMAP_V_MASK; |
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| 169 | } |
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| 170 | |||
| 171 | void pci_psycho_clear_interrupt(pci_t *pci, int inr) |
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| 172 | { |
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| 173 | pci->reg[PCI_PSYCHO_ICLR_BASE + (inr & INO_MASK)] = 0; |
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| 174 | } |
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| 175 | |||
| 1911 | jermar | 176 | /** Initialize PCI controller. */ |
| 177 | pci_t *pci_init(ofw_tree_node_t *node) |
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| 178 | { |
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| 179 | ofw_tree_property_t *prop; |
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| 180 | |||
| 181 | /* |
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| 182 | * First, verify this is a PCI node. |
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| 183 | */ |
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| 184 | ASSERT(strcmp(ofw_tree_node_name(node), "pci") == 0); |
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| 185 | |||
| 186 | /* |
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| 187 | * Determine PCI controller model. |
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| 188 | */ |
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| 189 | prop = ofw_tree_getprop(node, "model"); |
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| 190 | if (!prop || !prop->value) |
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| 191 | return NULL; |
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| 192 | |||
| 193 | if (strcmp(prop->value, "SUNW,sabre") == 0) { |
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| 194 | /* |
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| 195 | * PCI controller Sabre. |
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| 196 | * This model is found on UltraSPARC IIi based machines. |
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| 197 | */ |
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| 198 | return pci_sabre_init(node); |
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| 1984 | jermar | 199 | } else if (strcmp(prop->value, "SUNW,psycho") == 0) { |
| 200 | /* |
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| 201 | * PCI controller Psycho. |
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| 202 | * Used on UltraSPARC II based processors, for instance, |
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| 203 | * on Ultra 60. |
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| 204 | */ |
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| 205 | return pci_psycho_init(node); |
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| 1911 | jermar | 206 | } else { |
| 207 | /* |
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| 208 | * Unsupported model. |
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| 209 | */ |
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| 210 | printf("Unsupported PCI controller model (%s).\n", prop->value); |
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| 211 | } |
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| 212 | |||
| 213 | return NULL; |
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| 214 | } |
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| 215 | |||
| 216 | void pci_enable_interrupt(pci_t *pci, int inr) |
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| 217 | { |
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| 218 | ASSERT(pci->model); |
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| 219 | ASSERT(pci->op && pci->op->enable_interrupt); |
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| 220 | pci->op->enable_interrupt(pci, inr); |
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| 221 | } |
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| 222 | |||
| 223 | void pci_clear_interrupt(pci_t *pci, int inr) |
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| 224 | { |
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| 225 | ASSERT(pci->model); |
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| 226 | ASSERT(pci->op && pci->op->clear_interrupt); |
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| 227 | pci->op->clear_interrupt(pci, inr); |
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| 228 | } |
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| 229 | |||
| 230 | /** @} |
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| 231 | */ |