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1 | jermar | 1 | /* |
2071 | jermar | 2 | * Copyright (c) 2003-2004 Jakub Jermar |
1 | jermar | 3 | * All rights reserved. |
4 | * |
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5 | * Redistribution and use in source and binary forms, with or without |
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6 | * modification, are permitted provided that the following conditions |
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7 | * are met: |
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8 | * |
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9 | * - Redistributions of source code must retain the above copyright |
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10 | * notice, this list of conditions and the following disclaimer. |
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11 | * - Redistributions in binary form must reproduce the above copyright |
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12 | * notice, this list of conditions and the following disclaimer in the |
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13 | * documentation and/or other materials provided with the distribution. |
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14 | * - The name of the author may not be used to endorse or promote products |
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15 | * derived from this software without specific prior written permission. |
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16 | * |
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17 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
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18 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
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19 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
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20 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
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21 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
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22 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
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23 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
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24 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
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25 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
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26 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
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27 | */ |
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28 | |||
1881 | jermar | 29 | /** @addtogroup mips32interrupt |
1702 | cejka | 30 | * @{ |
31 | */ |
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32 | /** @file |
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33 | */ |
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34 | |||
575 | palkovsky | 35 | #include <interrupt.h> |
1 | jermar | 36 | #include <arch/interrupt.h> |
37 | #include <arch/types.h> |
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38 | #include <arch.h> |
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39 | #include <arch/cp0.h> |
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40 | #include <time/clock.h> |
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332 | palkovsky | 41 | #include <arch/drivers/arc.h> |
1258 | palkovsky | 42 | #include <ipc/sysipc.h> |
1936 | decky | 43 | #include <ddi/device.h> |
1258 | palkovsky | 44 | |
1936 | decky | 45 | #define IRQ_COUNT 8 |
46 | #define TIMER_IRQ 7 |
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47 | |||
1955 | decky | 48 | function virtual_timer_fnc = NULL; |
1936 | decky | 49 | static irq_t timer_irq; |
50 | |||
413 | jermar | 51 | /** Disable interrupts. |
52 | * |
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53 | * @return Old interrupt priority level. |
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54 | */ |
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55 | ipl_t interrupts_disable(void) |
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1 | jermar | 56 | { |
413 | jermar | 57 | ipl_t ipl = (ipl_t) cp0_status_read(); |
58 | cp0_status_write(ipl & ~cp0_status_ie_enabled_bit); |
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59 | return ipl; |
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1 | jermar | 60 | } |
61 | |||
413 | jermar | 62 | /** Enable interrupts. |
63 | * |
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64 | * @return Old interrupt priority level. |
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65 | */ |
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66 | ipl_t interrupts_enable(void) |
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1 | jermar | 67 | { |
413 | jermar | 68 | ipl_t ipl = (ipl_t) cp0_status_read(); |
69 | cp0_status_write(ipl | cp0_status_ie_enabled_bit); |
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70 | return ipl; |
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1 | jermar | 71 | } |
72 | |||
413 | jermar | 73 | /** Restore interrupt priority level. |
74 | * |
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75 | * @param ipl Saved interrupt priority level. |
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76 | */ |
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77 | void interrupts_restore(ipl_t ipl) |
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1 | jermar | 78 | { |
413 | jermar | 79 | cp0_status_write(cp0_status_read() | (ipl & cp0_status_ie_enabled_bit)); |
1 | jermar | 80 | } |
81 | |||
413 | jermar | 82 | /** Read interrupt priority level. |
83 | * |
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84 | * @return Current interrupt priority level. |
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85 | */ |
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86 | ipl_t interrupts_read(void) |
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1 | jermar | 87 | { |
125 | jermar | 88 | return cp0_status_read(); |
1 | jermar | 89 | } |
90 | |||
1434 | palkovsky | 91 | /* TODO: This is SMP unsafe!!! */ |
92 | static unsigned long nextcount; |
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93 | /** Start hardware clock */ |
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94 | static void timer_start(void) |
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95 | { |
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96 | nextcount = cp0_compare_value + cp0_count_read(); |
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97 | cp0_compare_write(nextcount); |
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98 | } |
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99 | |||
1936 | decky | 100 | static irq_ownership_t timer_claim(void) |
575 | palkovsky | 101 | { |
1936 | decky | 102 | return IRQ_ACCEPT; |
103 | } |
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104 | |||
105 | static void timer_irq_handler(irq_t *irq, void *arg, ...) |
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106 | { |
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1434 | palkovsky | 107 | unsigned long drift; |
108 | |||
109 | drift = cp0_count_read() - nextcount; |
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110 | while (drift > cp0_compare_value) { |
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111 | drift -= cp0_compare_value; |
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112 | CPU->missed_clock_ticks++; |
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113 | } |
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114 | nextcount = cp0_count_read() + cp0_compare_value - drift; |
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115 | cp0_compare_write(nextcount); |
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2107 | jermar | 116 | |
117 | /* |
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118 | * We are holding a lock which prevents preemption. |
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119 | * Release the lock, call clock() and reacquire the lock again. |
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120 | */ |
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121 | spinlock_unlock(&irq->lock); |
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575 | palkovsky | 122 | clock(); |
2107 | jermar | 123 | spinlock_lock(&irq->lock); |
1936 | decky | 124 | |
1955 | decky | 125 | if (virtual_timer_fnc != NULL) |
126 | virtual_timer_fnc(); |
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575 | palkovsky | 127 | } |
128 | |||
129 | /* Initialize basic tables for exception dispatching */ |
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130 | void interrupt_init(void) |
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131 | { |
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1936 | decky | 132 | irq_init(IRQ_COUNT, IRQ_COUNT); |
133 | |||
134 | irq_initialize(&timer_irq); |
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135 | timer_irq.devno = device_assign_devno(); |
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136 | timer_irq.inr = TIMER_IRQ; |
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137 | timer_irq.claim = timer_claim; |
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138 | timer_irq.handler = timer_irq_handler; |
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139 | irq_register(&timer_irq); |
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140 | |||
1434 | palkovsky | 141 | timer_start(); |
1936 | decky | 142 | cp0_unmask_int(TIMER_IRQ); |
1 | jermar | 143 | } |
1258 | palkovsky | 144 | |
1881 | jermar | 145 | /** @} |
1702 | cejka | 146 | */ |