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1 jermar 1 
/*
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 * Copyright (c) 2009 Jakub Jermar
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 * All rights reserved.
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 *
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 * Redistribution and use in source and binary forms, with or without
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 * modification, are permitted provided that the following conditions
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 * are met:
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 *
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 * - Redistributions of source code must retain the above copyright
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 *   notice, this list of conditions and the following disclaimer.
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 * - Redistributions in binary form must reproduce the above copyright
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 *   notice, this list of conditions and the following disclaimer in the
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 *   documentation and/or other materials provided with the distribution.
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 * - The name of the author may not be used to endorse or promote products
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 *   derived from this software without specific prior written permission.
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 *
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 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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 */
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/** @addtogroup genarch
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 * @{
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 */
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/**
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 * @file
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 * @brief Zilog 8530 serial controller driver.
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 */
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#include <genarch/drivers/z8530/z8530.h>
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#include <console/chardev.h>
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#include <ddi/irq.h>
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#include <arch/asm.h>
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#include <mm/slab.h>
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#include <ddi/device.h>
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static indev_operations_t kbrdin_ops = {
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    .poll = NULL
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};
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static inline void z8530_write(ioport8_t *ctl, uint8_t reg, uint8_t val)
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{
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    /*
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     * Registers 8-15 will automatically issue the Point High
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     * command as their bit 3 is 1.
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     */
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    pio_write_8(ctl, reg);  /* Select register */
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    pio_write_8(ctl, val);  /* Write value */
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}
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static inline uint8_t z8530_read(ioport8_t *ctl, uint8_t reg)
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{
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    /*
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     * Registers 8-15 will automatically issue the Point High
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     * command as their bit 3 is 1.
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     */
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    pio_write_8(ctl, reg);   /* Select register */
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    return pio_read_8(ctl);
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}
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static irq_ownership_t z8530_claim(irq_t *irq)
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{
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    z8530_instance_t *instance = irq->instance;
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    z8530_t *dev = instance->z8530;
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    if (z8530_read(&dev->ctl_a, RR0) & RR0_RCA)
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        return IRQ_ACCEPT;
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    else
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        return IRQ_DECLINE;
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}
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static void z8530_irq_handler(irq_t *irq)
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{
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    z8530_instance_t *instance = irq->instance;
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    z8530_t *dev = instance->z8530;
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    if (z8530_read(&dev->ctl_a, RR0) & RR0_RCA) {
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        uint8_t x = z8530_read(&dev->ctl_a, RR8);
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        indev_push_character(&instance->kbrdin, x);
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    }
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}
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/** Initialize z8530. */
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indev_t *z8530_init(z8530_t *dev, inr_t inr, cir_t cir, void *cir_arg)
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{
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    z8530_instance_t *instance
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        = malloc(sizeof(z8530_instance_t), FRAME_ATOMIC);
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    if (!instance)
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        return false;
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    indev_initialize("z8530", &instance->kbrdin, &kbrdin_ops);
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    instance->z8530 = dev;
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    irq_initialize(&instance->irq);
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    instance->irq.devno = device_assign_devno();
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    instance->irq.inr = inr;
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    instance->irq.claim = z8530_claim;
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    instance->irq.handler = z8530_irq_handler;
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    instance->irq.instance = instance;
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    instance->irq.cir = cir;
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    instance->irq.cir_arg = cir_arg;
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    irq_register(&instance->irq);
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    (void) z8530_read(&dev->ctl_a, RR8);
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    /*
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     * Clear any pending TX interrupts or we never manage
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     * to set FHC UART interrupt state to idle.
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     */
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    z8530_write(&dev->ctl_a, WR0, WR0_TX_IP_RST);
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    /* interrupt on all characters */
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    z8530_write(&dev->ctl_a, WR1, WR1_IARCSC);
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    /* 8 bits per character and enable receiver */
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    z8530_write(&dev->ctl_a, WR3, WR3_RX8BITSCH | WR3_RX_ENABLE);
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    /* Master Interrupt Enable. */
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    z8530_write(&dev->ctl_a, WR9, WR9_MIE);
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    return &instance->kbrdin;
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}
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/** @}
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 */