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Rev | Author | Line No. | Line |
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2128 | jermar | 1 | # |
2465 | jermar | 2 | # Copyright (c) 2007 Michal Kebrt |
2128 | jermar | 3 | # All rights reserved. |
4 | # |
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5 | # Redistribution and use in source and binary forms, with or without |
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6 | # modification, are permitted provided that the following conditions |
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7 | # are met: |
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8 | # |
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9 | # - Redistributions of source code must retain the above copyright |
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10 | # notice, this list of conditions and the following disclaimer. |
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11 | # - Redistributions in binary form must reproduce the above copyright |
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12 | # notice, this list of conditions and the following disclaimer in the |
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13 | # documentation and/or other materials provided with the distribution. |
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14 | # - The name of the author may not be used to endorse or promote products |
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15 | # derived from this software without specific prior written permission. |
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16 | # |
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17 | # THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
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18 | # IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
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19 | # OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
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20 | # IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
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21 | # INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
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22 | # NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
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23 | # DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
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24 | # THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
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25 | # (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
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26 | # THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
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27 | # |
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28 | |||
2465 | jermar | 29 | #include <arch/asm/boot.h> |
30 | |||
31 | .text |
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32 | |||
2128 | jermar | 33 | .global kernel_image_start |
2465 | jermar | 34 | .global exc_stack |
35 | .global supervisor_sp |
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36 | |||
2128 | jermar | 37 | kernel_image_start: |
4718 | mejdrech | 38 | |
39 | # initialize Stack pointer for exception modes |
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40 | mrs r4, cpsr |
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41 | bic r4, r4, #0x1f |
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42 | |||
43 | #FIQ Mode |
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44 | orr r3, r4, #0x11 |
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45 | msr cpsr_c, r3 |
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46 | ldr sp, =exc_stack |
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47 | |||
48 | #IRQ Mode |
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49 | orr r3, r4, #0x12 |
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50 | msr cpsr_c, r3 |
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51 | ldr sp, =exc_stack |
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52 | |||
53 | #ABORT Mode |
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54 | orr r3, r4, #0x17 |
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55 | msr cpsr_c, r3 |
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56 | ldr sp, =exc_stack |
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57 | |||
58 | #UNDEFINED Mode |
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59 | orr r3, r4, #0x1b |
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60 | msr cpsr_c, r3 |
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61 | ldr sp, =exc_stack |
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62 | |||
2465 | jermar | 63 | # switch to supervisor mode |
4718 | mejdrech | 64 | orr r3, r4, #0x13 |
4153 | mejdrech | 65 | msr cpsr_c, r3 |
2465 | jermar | 66 | |
67 | ldr sp, =temp_stack |
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2128 | jermar | 68 | |
2465 | jermar | 69 | bl arch_pre_main |
4153 | mejdrech | 70 | |
2465 | jermar | 71 | bl main_bsp |
72 | |||
73 | .space TEMP_STACK_SIZE |
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74 | temp_stack: |
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75 | |||
76 | .space 1024 |
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77 | exc_stack: |
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78 | |||
79 | supervisor_sp: |
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80 | .space 4 |