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1 jermar 1 
/*
2071 jermar 2 
 * Copyright (c) 2001-2004 Jakub Jermar
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 * All rights reserved.
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 *
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 * Redistribution and use in source and binary forms, with or without
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 * modification, are permitted provided that the following conditions
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 * are met:
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 *
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 * - Redistributions of source code must retain the above copyright
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 *   notice, this list of conditions and the following disclaimer.
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 * - Redistributions in binary form must reproduce the above copyright
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 *   notice, this list of conditions and the following disclaimer in the
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 *   documentation and/or other materials provided with the distribution.
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 * - The name of the author may not be used to endorse or promote products
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 *   derived from this software without specific prior written permission.
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 *
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 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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 */
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/** @addtogroup ia32   
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 * @{
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 */
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/**
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 * @file
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 * @brief PIC driver.
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 *
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 * Programmable Interrupt Controller for UP systems based on i8259 chip.
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 */
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#include <arch/drivers/i8259.h>
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#include <cpu.h>
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#include <arch/types.h>
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#include <arch/asm.h>
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#include <arch.h>
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#include <print.h>
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#include <interrupt.h>
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static void pic_spurious(int n, istate_t *istate);
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void i8259_init(void)
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{
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    /* ICW1: this is ICW1, ICW4 to follow */
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    pio_write_8(PIC_PIC0PORT1, PIC_ICW1 | PIC_NEEDICW4);
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    /* ICW2: IRQ 0 maps to INT IRQBASE */
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    pio_write_8(PIC_PIC0PORT2, IVT_IRQBASE);
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    /* ICW3: pic1 using IRQ IRQ_PIC1 */
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    pio_write_8(PIC_PIC0PORT2, 1 << IRQ_PIC1);
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    /* ICW4: i8086 mode */
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    pio_write_8(PIC_PIC0PORT2, 1);
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    /* ICW1: ICW1, ICW4 to follow */
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    pio_write_8(PIC_PIC1PORT1, PIC_ICW1 | PIC_NEEDICW4);
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    /* ICW2: IRQ 8 maps to INT (IVT_IRQBASE + 8) */
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    pio_write_8(PIC_PIC1PORT2, IVT_IRQBASE + 8);
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    /* ICW3: pic1 is known as IRQ_PIC1 */
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    pio_write_8(PIC_PIC1PORT2, IRQ_PIC1);
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    /* ICW4: i8086 mode */
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    pio_write_8(PIC_PIC1PORT2, 1);
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    /*
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     * Register interrupt handler for the PIC spurious interrupt.
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     */
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    exc_register(VECTOR_PIC_SPUR, "pic_spurious", (iroutine) pic_spurious);
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    /*
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     * Set the enable/disable IRQs handlers.
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     * Set the End-of-Interrupt handler.
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     */
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    enable_irqs_function = pic_enable_irqs;
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    disable_irqs_function = pic_disable_irqs;
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    eoi_function = pic_eoi;
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    pic_disable_irqs(0xffff);       /* disable all irq's */
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    pic_enable_irqs(1 << IRQ_PIC1);     /* but enable pic1 */
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}
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void pic_enable_irqs(uint16_t irqmask)
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{
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    uint8_t x;
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    if (irqmask & 0xff) {
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        x = pio_read_8(PIC_PIC0PORT2);
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        pio_write_8(PIC_PIC0PORT2, (uint8_t) (x & (~(irqmask & 0xff))));
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    }
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    if (irqmask >> 8) {
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        x = pio_read_8(PIC_PIC1PORT2);
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        pio_write_8(PIC_PIC1PORT2, (uint8_t) (x & (~(irqmask >> 8))));
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    }
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}
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void pic_disable_irqs(uint16_t irqmask)
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{
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    uint8_t x;
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    if (irqmask & 0xff) {
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        x = pio_read_8(PIC_PIC0PORT2);
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        pio_write_8(PIC_PIC0PORT2, (uint8_t) (x | (irqmask & 0xff)));
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    }
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    if (irqmask >> 8) {
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        x = pio_read_8(PIC_PIC1PORT2);
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        pio_write_8(PIC_PIC1PORT2, (uint8_t) (x | (irqmask >> 8)));
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    }
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}
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void pic_eoi(void)
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{
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    pio_write_8((ioport8_t *)0x20, 0x20);
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    pio_write_8((ioport8_t *)0xa0, 0x20);
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}
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void pic_spurious(int n __attribute__((unused)), istate_t *istate __attribute__((unused)))
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{
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#ifdef CONFIG_DEBUG
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    printf("cpu%u: PIC spurious interrupt\n", CPU->id);
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#endif
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}
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/** @}
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 */