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| Rev | Author | Line No. | Line |
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| 2278 | jancik | 1 | /* |
| 2 | * Copyright (c) 2007 Pavel Jancik, Michal Kebrt |
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| 3 | * All rights reserved. |
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| 4 | * |
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| 5 | * Redistribution and use in source and binary forms, with or without |
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| 6 | * modification, are permitted provided that the following conditions |
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| 7 | * are met: |
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| 8 | * |
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| 9 | * - Redistributions of source code must retain the above copyright |
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| 10 | * notice, this list of conditions and the following disclaimer. |
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| 11 | * - Redistributions in binary form must reproduce the above copyright |
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| 12 | * notice, this list of conditions and the following disclaimer in the |
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| 13 | * documentation and/or other materials provided with the distribution. |
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| 14 | * - The name of the author may not be used to endorse or promote products |
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| 15 | * derived from this software without specific prior written permission. |
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| 16 | * |
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| 17 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
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| 18 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
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| 19 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
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| 20 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
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| 21 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
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| 22 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
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| 23 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
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| 24 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
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| 25 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
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| 26 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
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| 27 | */ |
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| 28 | |||
| 29 | /** @addtogroup arm32mm |
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| 30 | * @{ |
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| 31 | */ |
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| 32 | /** @file |
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| 2410 | stepan | 33 | * @brief Page fault related declarations. |
| 2278 | jancik | 34 | */ |
| 2414 | kebrt | 35 | |
| 2278 | jancik | 36 | #ifndef KERN_arm32_PAGE_FAULT_H_ |
| 2414 | kebrt | 37 | #define KERN_arm32_PAGE_FAULT_H_ |
| 2278 | jancik | 38 | |
| 39 | #include <arch/types.h> |
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| 40 | |||
| 2304 | kebrt | 41 | |
| 2329 | kebrt | 42 | /** Decribes CP15 "fault status register" (FSR). */ |
| 2278 | jancik | 43 | typedef struct { |
| 2304 | kebrt | 44 | unsigned status : 3; |
| 45 | unsigned domain : 4; |
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| 46 | unsigned zero : 1; |
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| 47 | unsigned should_be_zero : 24; |
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| 2417 | kebrt | 48 | } ATTRIBUTE_PACKED fault_status_t; |
| 2278 | jancik | 49 | |
| 2304 | kebrt | 50 | |
| 2329 | kebrt | 51 | /** Help union used for casting integer value into #fault_status_t. */ |
| 2278 | jancik | 52 | typedef union { |
| 2304 | kebrt | 53 | fault_status_t fs; |
| 54 | uint32_t dummy; |
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| 2278 | jancik | 55 | } fault_status_union_t; |
| 56 | |||
| 2304 | kebrt | 57 | |
| 58 | /** Simplified description of instruction code. |
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| 2329 | kebrt | 59 | * |
| 60 | * @note Used for recognizing memory access instructions. |
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| 61 | * @see ARM architecture reference (chapter 3.1) |
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| 2278 | jancik | 62 | */ |
| 63 | typedef struct { |
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| 2304 | kebrt | 64 | unsigned dummy1 : 4; |
| 65 | unsigned bit4 : 1; |
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| 66 | unsigned bits567 : 3; |
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| 67 | unsigned dummy : 12; |
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| 68 | unsigned access : 1; |
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| 69 | unsigned opcode : 4; |
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| 70 | unsigned type : 3; |
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| 71 | unsigned condition : 4; |
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| 2417 | kebrt | 72 | } ATTRIBUTE_PACKED instruction_t; |
| 2278 | jancik | 73 | |
| 2304 | kebrt | 74 | |
| 75 | /** Help union used for casting pc register (uint_32_t) value into |
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| 76 | * #instruction_t pointer. |
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| 2278 | jancik | 77 | */ |
| 78 | typedef union { |
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| 2417 | kebrt | 79 | instruction_t *instr; |
| 2304 | kebrt | 80 | uint32_t pc; |
| 2278 | jancik | 81 | } instruction_union_t; |
| 82 | |||
| 2304 | kebrt | 83 | |
| 2278 | jancik | 84 | extern void prefetch_abort(int n, istate_t *istate); |
| 85 | extern void data_abort(int n, istate_t *istate); |
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| 86 | |||
| 2329 | kebrt | 87 | |
| 2278 | jancik | 88 | #endif |
| 89 | |||
| 90 | /** @} |
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| 91 | */ |
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| 92 |