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756 6683 d 17 h jermar /kernel/trunk/ Memory management work.
Remove the last (i.e. 'root') argument from page_mapping_insert() and page_mapping_find().
Page table address is now extracted from the first (i.e. 'as') argument.
Add a lot of infrastructure to make the above possible.
sparc64 is now broken, most likely because of insufficient identity mapping of physical memory.		  
755 6684 d 16 h jermar /kernel/trunk/ Change page_mapping_find/insert interfaces to take as_t * as first argument
and not asid_t as second argument. This change was necessitated by the
removal of mapping array from as_area_t and the fact that an address
space doesn't have an ASID when it is created.		  
753 6685 d 0 h jermar /kernel/trunk/ Convert ASID management of ia64 to ASID FIFO mechanism.
18-bit RIDs are supported.		  
746 6689 d 2 h jermar /kernel/trunk/ Page hash table modifications.  
741 6690 d 20 h jermar /kernel/trunk/ Unlock address space prior TLB shootdown in get_asid() to unify
the locking order among mips32, sparc64 and ia64.

Add ASID_STEALING_ENABLED macro to disable the stealing part on ia64
in a clean way.		  
740 6691 d 2 h jermar /kernel/trunk/ ia64 ASID management code (not tested).  
730 6693 d 23 h jermar /kernel/trunk/ Finalize ASID management for sparc64 and mips32 by making use of FIFO queue of ASIDs.  
727 6695 d 18 h jermar /kernel/trunk/ New ASID management subsystem (initial work, more is required).
Some TLB invalidation changes.		  
699 6705 d 3 h jermar /kernel/trunk/ Memory management work.
Proto-interface and dummy implementation of generic page hash table subsytem.		  
689 6707 d 0 h bondari /kernel/trunk/ Frame alloc test #1  
687 6707 d 0 h jermar /kernel/trunk/ Memory management work.
Pass address space identifier to functions in page_operations to support single global page hash table.		  
684 6707 d 2 h jermar /kernel/trunk/ Memory management work.
Move generic 4-level page table interface to genarch
and enable architectures to use different virtual memory
mechanisms (e.g. page hash tables).
Start page hash table support.
Switch ia64 and sparc64 to page hash tables.
Other architectures keep on using 4-level page table interface.