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Rev Age Author Path Log message Diff
832 6656 d 18 h jermar /kernel/trunk/ Change pt_mapping_remove() to deallocate frames for empty PTL1, PTL2 and PTL3.  
793 6661 d 1 h jermar /kernel/trunk/ Use hash_table_get_instance instead of list_get_instance.
Rename page_operations to page_mapping_operations.
Rename page_pt_operations to pt_mapping_operations.
Rename page_ht_operations to ht_mapping_operations.		  
792 6661 d 2 h jermar /kernel/trunk/ Page hash table architectures now use generic hash table to manage
mappings.		  
760 6665 d 3 h jermar /kernel/trunk/ mips32 is not supposed to allocate page table.
This is done by the generic code now.
Remove PTL0 pointer as it is not needed.

Remove GET_PTL0_ADDRESS from kernel.

Update sparc64 comments in barrier.h.		  
756 6666 d 16 h jermar /kernel/trunk/ Memory management work.
Remove the last (i.e. 'root') argument from page_mapping_insert() and page_mapping_find().
Page table address is now extracted from the first (i.e. 'as') argument.
Add a lot of infrastructure to make the above possible.
sparc64 is now broken, most likely because of insufficient identity mapping of physical memory.		  
755 6667 d 16 h jermar /kernel/trunk/ Change page_mapping_find/insert interfaces to take as_t * as first argument
and not asid_t as second argument. This change was necessitated by the
removal of mapping array from as_area_t and the fact that an address
space doesn't have an ASID when it is created.		  
746 6672 d 2 h jermar /kernel/trunk/ Page hash table modifications.  
730 6676 d 23 h jermar /kernel/trunk/ Finalize ASID management for sparc64 and mips32 by making use of FIFO queue of ASIDs.  
699 6688 d 3 h jermar /kernel/trunk/ Memory management work.
Proto-interface and dummy implementation of generic page hash table subsytem.		  
684 6690 d 1 h jermar /kernel/trunk/ Memory management work.
Move generic 4-level page table interface to genarch
and enable architectures to use different virtual memory
mechanisms (e.g. page hash tables).
Start page hash table support.
Switch ia64 and sparc64 to page hash tables.
Other architectures keep on using 4-level page table interface.