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Rev Age Author Path Log message Diff
867 6645 d 4 h jermar /kernel/trunk/ Move OFW functionality of ppc32 memory_init to genarch so that the code can also be used by sparc64.
sparc64 is now close to broken as it lacks functionality to provide identity mapping for the whole phyisical memory.		  
864 6645 d 20 h jermar /kernel/trunk/arch/sparc64/include/trap/ Add forgotten file.  
863 6645 d 20 h jermar /kernel/trunk/arch/sparc64/ sparc64 work.
Add initial TLB miss handlers.		  
861 6646 d 6 h jermar /kernel/trunk/arch/sparc64/include/ Add atomic_add() operation for sparc64.  
860 6646 d 19 h decky /kernel/trunk/ indentation changes
ppc32 fpu context save/restore
ppc32 CPU version
ppc32 memcpy		  
847 6650 d 1 h jermar /kernel/trunk/arch/sparc64/ Improve comments in start.S.  
846 6650 d 2 h jermar /kernel/trunk/arch/sparc64/ sparc64 work.
Relocate kernel to 4M.		  
815 6659 d 6 h jermar /kernel/trunk/ Fix sparc64 and ia64 to work with the changed frame allocator.

Fix ppc32 to at least compile.		  
792 6661 d 5 h jermar /kernel/trunk/ Page hash table architectures now use generic hash table to manage
mappings.		  
765 6664 d 22 h jermar /kernel/trunk/ Add PAGE_WIDTH to aid divisions by PAGE_SIZE.  
763 6665 d 4 h jermar /kernel/trunk/ Modify frame.h to use shifting instead of multiplication and division.
Define FRAME_WIDTH for all architectures.		  
760 6665 d 7 h jermar /kernel/trunk/ mips32 is not supposed to allocate page table.
This is done by the generic code now.
Remove PTL0 pointer as it is not needed.

Remove GET_PTL0_ADDRESS from kernel.

Update sparc64 comments in barrier.h.		  
758 6665 d 20 h jermar /kernel/trunk/arch/ sparc64 bugfix.
When disabling IMMU and DMMU the kernel has to perform synchronization operation
(e.g flush %r or membar #Sync instruction). There is no guarantee that the address
contained in %r is in DTLB and therefore the flush instruction can fault. Normally
this would be recognized and fixed by the OpenFirmware Fast Data MMU fault handler.
However, this handler lives in virtually mapped memory and an attempt to execute
there while the MMUs are disabled would result in a nested trap leading to error state.
Replacing flush %r instruction with membar #Sync, wich is sufficient in this case,
fixes this problem.		  
757 6665 d 22 h jermar /kernel/trunk/ Blacklist addresses between 0xa0000 and 0xfffff on ia64 for frame allocator.
This area contains VGA text frame buffer and should be avoided.
falloc2 test now passes on ia64.		  
756 6666 d 19 h jermar /kernel/trunk/ Memory management work.
Remove the last (i.e. 'root') argument from page_mapping_insert() and page_mapping_find().
Page table address is now extracted from the first (i.e. 'as') argument.
Add a lot of infrastructure to make the above possible.
sparc64 is now broken, most likely because of insufficient identity mapping of physical memory.		  
753 6668 d 3 h jermar /kernel/trunk/ Convert ASID management of ia64 to ASID FIFO mechanism.
18-bit RIDs are supported.		  
746 6672 d 5 h jermar /kernel/trunk/ Page hash table modifications.  
743 6673 d 22 h jermar /kernel/trunk/arch/ sparc64 work.
13 bits wide means the max value is 8191 and not 0x8191.		  
742 6673 d 22 h jermar /kernel/trunk/arch/ sparc64 work.
Memory context (ASID) is, in fact, 13 bits (and not 12 bits) wide.		  
741 6673 d 23 h jermar /kernel/trunk/ Unlock address space prior TLB shootdown in get_asid() to unify
the locking order among mips32, sparc64 and ia64.

Add ASID_STEALING_ENABLED macro to disable the stealing part on ia64
in a clean way.		  

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