| Rev |
Age |
Author |
Path |
Log message |
Diff |
| 792 |
6677 d 22 h |
jermar |
/kernel/trunk/ |
Page hash table architectures now use generic hash table to manage
mappings. |
|
| 765 |
6681 d 16 h |
jermar |
/kernel/trunk/ |
Add PAGE_WIDTH to aid divisions by PAGE_SIZE. |
|
| 763 |
6681 d 22 h |
jermar |
/kernel/trunk/ |
Modify frame.h to use shifting instead of multiplication and division.
Define FRAME_WIDTH for all architectures. |
|
| 760 |
6682 d 0 h |
jermar |
/kernel/trunk/ |
mips32 is not supposed to allocate page table.
This is done by the generic code now.
Remove PTL0 pointer as it is not needed.
Remove GET_PTL0_ADDRESS from kernel.
Update sparc64 comments in barrier.h. |
|
| 758 |
6682 d 14 h |
jermar |
/kernel/trunk/arch/ |
sparc64 bugfix.
When disabling IMMU and DMMU the kernel has to perform synchronization operation
(e.g flush %r or membar #Sync instruction). There is no guarantee that the address
contained in %r is in DTLB and therefore the flush instruction can fault. Normally
this would be recognized and fixed by the OpenFirmware Fast Data MMU fault handler.
However, this handler lives in virtually mapped memory and an attempt to execute
there while the MMUs are disabled would result in a nested trap leading to error state.
Replacing flush %r instruction with membar #Sync, wich is sufficient in this case,
fixes this problem. |
|
| 757 |
6682 d 16 h |
jermar |
/kernel/trunk/ |
Blacklist addresses between 0xa0000 and 0xfffff on ia64 for frame allocator.
This area contains VGA text frame buffer and should be avoided.
falloc2 test now passes on ia64. |
|
| 756 |
6683 d 13 h |
jermar |
/kernel/trunk/ |
Memory management work.
Remove the last (i.e. 'root') argument from page_mapping_insert() and page_mapping_find().
Page table address is now extracted from the first (i.e. 'as') argument.
Add a lot of infrastructure to make the above possible.
sparc64 is now broken, most likely because of insufficient identity mapping of physical memory. |
|
| 753 |
6684 d 20 h |
jermar |
/kernel/trunk/ |
Convert ASID management of ia64 to ASID FIFO mechanism.
18-bit RIDs are supported. |
|
| 747 |
6688 d 14 h |
jermar |
/kernel/trunk/ |
ia64 work.
Add nice wrappers for thash and ttag instructions.
Add nice wrappers for accessing reion registers and PTA.
Fix set_vhpt_environment().
Allocate and initialize page_ht (a.k.a. VHPT).
Add missing header to sparc64.
Remove excessive header from debug.h. |
|
| 746 |
6688 d 23 h |
jermar |
/kernel/trunk/ |
Page hash table modifications. |
|
| 743 |
6690 d 16 h |
jermar |
/kernel/trunk/arch/ |
sparc64 work.
13 bits wide means the max value is 8191 and not 0x8191. |
|
| 742 |
6690 d 16 h |
jermar |
/kernel/trunk/arch/ |
sparc64 work.
Memory context (ASID) is, in fact, 13 bits (and not 12 bits) wide. |
|
| 741 |
6690 d 16 h |
jermar |
/kernel/trunk/ |
Unlock address space prior TLB shootdown in get_asid() to unify
the locking order among mips32, sparc64 and ia64.
Add ASID_STEALING_ENABLED macro to disable the stealing part on ia64
in a clean way. |
|
| 730 |
6693 d 19 h |
jermar |
/kernel/trunk/ |
Finalize ASID management for sparc64 and mips32 by making use of FIFO queue of ASIDs. |
|
| 727 |
6695 d 14 h |
jermar |
/kernel/trunk/ |
New ASID management subsystem (initial work, more is required).
Some TLB invalidation changes. |
|
| 703 |
6702 d 0 h |
jermar |
/kernel/trunk/ |
Memory management work.
- vm.* -> as.* (as like address space is, imho, more fitting)
- Don't do TLB shootdown on vm_install(). Some architectures only need to call tlb_invalidate_asid().
- Don't allocate all frames for as_area in as_area_create(), but let them be allocated on-demand by as_page_fault().
- Add high-level page fault handler as_page_fault().
- Add as_area_load_mapping(). |
|
| 700 |
6704 d 23 h |
jermar |
/kernel/trunk/arch/sparc64/include/ |
Remove fmath.h |
|
| 699 |
6704 d 23 h |
jermar |
/kernel/trunk/ |
Memory management work.
Proto-interface and dummy implementation of generic page hash table subsytem. |
|
| 691 |
6706 d 20 h |
jermar |
/kernel/trunk/arch/ |
Cleanup. |
|
| 684 |
6706 d 22 h |
jermar |
/kernel/trunk/ |
Memory management work.
Move generic 4-level page table interface to genarch
and enable architectures to use different virtual memory
mechanisms (e.g. page hash tables).
Start page hash table support.
Switch ia64 and sparc64 to page hash tables.
Other architectures keep on using 4-level page table interface. |
|