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Rev Age Author Path Log message Diff
519 6746 d 0 h vana /kernel/trunk/arch/ia64/ Keyboard support for ski (ia64 emulator)  
503 6751 d 5 h jermar /kernel/trunk/ Rename arch_late_init() to arch_pre_smp_init().
Add arch_post_smp_init().
Enable IRQ_KBD on ia-32 (doesn't work on Bochs SMP, works on Bochs UP).		  
501 6751 d 7 h jermar / Rename HelenOS/SPARTAN to HelenOS/kernel.  
478 6762 d 5 h jermar /SPARTAN/trunk/ Re-aply mistakenly reverted changes.  
477 6762 d 8 h vana /SPARTAN/trunk/ Atomic inc & dec functions synchronized on all ia32,ia64 and mips platforms. Now there are 3 versions which returns no value, new value and old value och changed variable.  
476 6762 d 9 h jermar /SPARTAN/trunk/arch/ia64/ ia64 CPU identification.  
473 6763 d 23 h jermar /SPARTAN/trunk/arch/ia64/src/ ia64 work.
Comment some offending steps of heavyweight interrupt handler regarding RSE switching.
With this change, ia64 will do well on tests rwlock #4 and thread #1.
Cleanup.		  
472 6764 d 7 h jermar /SPARTAN/trunk/ Changes in build system.
For .S targets, always do -D__ASM__.
Remove unnecessary #define __ASM__ from various *.S files.
At the end of build, generate disassembler dump for kernel.raw.

ia64 work.
Better General Exception handler.		  
470 6764 d 21 h jermar /SPARTAN/trunk/ ia64 work.
Big cleanup of IA-64 interrupt processing.
Merge of interrupt.c and interrupt_handler.c.
Rewrite of ivt.S and interrupt.c.
Higher level interrupt handlers are now passed a vector number and a pointer to stack structure.

ia32 work.
ia32 has ordered writes. Until it deploys weaker memory ordering model, write_barrier() can be empty statement.		  
456 6765 d 10 h jermar /SPARTAN/trunk/arch/ia64/src/ ia64 work.
Add missing srlz_d().
Remove extra stops.
Coding style cleanups.		  
445 6766 d 7 h jermar /SPARTAN/trunk/arch/ia64/ ia64 work.
Fix SP_DELTA alignment.
Cosmetics.		  
444 6766 d 7 h vana /SPARTAN/trunk/arch/ia64/ Context restore in HEAVYWEIGHT handlers  
443 6766 d 8 h jermar /SPARTAN/trunk/arch/ia64/ ia64 work.
Do not break memory stack alignment in heavyweight interrupt handler.
Reserve scratch area for nested procedure calls on memory stack.		  
442 6766 d 9 h vana /SPARTAN/trunk/arch/ia64/src/ sp should not be decremented after last save  
441 6766 d 9 h jermar /SPARTAN/trunk/arch/ia64/src/ r12 (stack pointer) must be descremented prior to storing data into new memory stack frame.  
439 6767 d 5 h jermar /SPARTAN/trunk/arch/ia64/src/ Two small ia64 improvements.  
438 6767 d 6 h jermar /SPARTAN/trunk/arch/ia64/src/ ia64 work.
Heavyweight handler should be complete up to the point where it switches back to interrupted RSE context.		  
435 6768 d 1 h jermar /SPARTAN/trunk/arch/ia64/ ia64 work.
Begin implemention of heavyweight interrupt handler.
Finish implementation of interval timer.
Add some PAL macros.		  
434 6770 d 0 h jermar /SPARTAN/trunk/arch/ia64/src/ Fix switch variable.  
433 6770 d 0 h jermar /SPARTAN/trunk/arch/ia64/ ia64 work.
Fix definition of __u32.
Add more register manipulation functions.
Add unions describing bit-structured registers.
Distinguish between timer, unhandled and spurious external interrupts.
Initialize interval timer to generate first timer interrupt.		  

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