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911 6640 d 23 h jermar /kernel/trunk/arch/ia64/ ia64 work.

Change heavyweight interrupt handler to use bank 0 registers instead of AR.KR0 and AR.KR1.
This prevents userspace from the possibility to see what addresses are being used by kernel.

Store kernel stack address in bank 0 r23 instead of AR.KR7. Again, userspace will not be
able to read the address of its kernel stack.

Increase FRAME_SIZE to 64K as this is the first supported page size in which will fit
thread's combined register and memory stack. (RSE can write out as many as 16K.)
 
869 6651 d 16 h vana /kernel/trunk/ Uaaaaaaa ;-) Itanium Paging !!!!!! ;-)  
746 6679 d 1 h jermar /kernel/trunk/ Page hash table modifications.  
534 6731 d 20 h jermar / Rename HelenOS/SPARTAN to HelenOS/kernel again.  
532 6731 d 20 h jermar / Revert renaming of HelenOS/SPARTAN to HelenOS/kernel because of important pending patch.  
501 6744 d 0 h jermar / Rename HelenOS/SPARTAN to HelenOS/kernel.  
476 6755 d 3 h jermar /SPARTAN/trunk/arch/ia64/ ia64 CPU identification.  
472 6757 d 1 h jermar /SPARTAN/trunk/ Changes in build system.
For .S targets, always do -D__ASM__.
Remove unnecessary #define __ASM__ from various *.S files.
At the end of build, generate disassembler dump for kernel.raw.

ia64 work.
Better General Exception handler.
 
470 6757 d 14 h jermar /SPARTAN/trunk/ ia64 work.
Big cleanup of IA-64 interrupt processing.
Merge of interrupt.c and interrupt_handler.c.
Rewrite of ivt.S and interrupt.c.
Higher level interrupt handlers are now passed a vector number and a pointer to stack structure.

ia32 work.
ia32 has ordered writes. Until it deploys weaker memory ordering model, write_barrier() can be empty statement.
 
433 6762 d 18 h jermar /SPARTAN/trunk/arch/ia64/ ia64 work.
Fix definition of __u32.
Add more register manipulation functions.
Add unions describing bit-structured registers.
Distinguish between timer, unhandled and spurious external interrupts.
Initialize interval timer to generate first timer interrupt.
 
432 6762 d 19 h jermar /SPARTAN/trunk/arch/ IA-64 work.
Add some asm functions for manipulation with PSR, AR and CR registers.