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Rev Age Author Path Log message Diff
952 6642 d 0 h jermar /kernel/trunk/ Support for loading segments containing .bss section.  
951 6642 d 1 h decky /kernel/trunk/arch/ppc32/ ppc32 boots again (temporarily)  
947 6642 d 6 h vana /kernel/trunk/ Better purge page selection.  
945 6642 d 19 h vana /kernel/trunk/arch/ia64/  
944 6642 d 19 h vana /kernel/trunk/ Itanium tlb_invalidate_pages  
941 6642 d 21 h palkovsky /kernel/trunk/ Fixed mips elf loading.  
940 6642 d 21 h jermar /kernel/trunk/ Get rid of unneeded macros.
Their functionality has been replaced by the ELF loader.		  
938 6642 d 22 h jermar /kernel/trunk/ Basic support for loading ELF object files.
ia64, amd64, ia32 working.
mips32 requires some attention.		  
935 6642 d 23 h vana /kernel/trunk/ Two frame stack (standard stack + RSE) on Itanium  
934 6642 d 23 h decky /kernel/trunk/arch/ppc32/ remove all OpenFirmware bindings from ppc32 kernel code
kernel now runs in real mode (ppc32)		  
928 6643 d 3 h vana /kernel/trunk/ Itanium tlb_invalidate_all  
925 6643 d 6 h palkovsky /kernel/trunk/arch/ia32/src/mm/ Fix e820list on ia32.  
924 6643 d 7 h palkovsky /kernel/trunk/arch/mips32/ Macro redefinition for mips fpu.  
923 6643 d 15 h vana /kernel/trunk/arch/ia64/src/ paging_start counting fix on ia64  
921 6645 d 22 h jermar /kernel/trunk/arch/ia64/ ia64 work.
Userspace is now working.
There is an unrelated show stopper, however.		  
919 6646 d 3 h jermar /kernel/trunk/ ia64 work.
Changes to make userspace work (kernel part).
Use ski.conf from contrib directory to run Ski.

There is actually no appropriate syscall handler yet.		  
916 6648 d 5 h jermar /kernel/trunk/arch/ia64/src/ ia64 work.
Support switch from userspace register stack in heavyweight handler.		  
915 6648 d 6 h jermar /kernel/trunk/arch/ia64/ ia64 work.
- Another item had to be allocated on stack to remember new value written to ar.bspstore.
Fix heavyweight interruption handler to calculate RSC.loadrs from the new value of ar.bspstore
instead from the old one.
Uncomment instructions switching ar.bspstore.
- Configure kernel with 512M of memory.		  
912 6649 d 20 h jermar /kernel/trunk/ ia64 work.

ivt.S:
Detect userspace stack in heavyweight handler and switch to kernel stack.
Remember the old stack pointer.
As for register stack, kernel stack is assumed still.
Fix alignment issues that showed when STACK_ITEMS was odd.
Fix ld8 instruction that did subtraction of 8 instead of addition of 8.

scheduler.c:
Change before_thread_runs_arch() to calculate address of top of the stack
for the interrupt handler.		  
911 6650 d 0 h jermar /kernel/trunk/arch/ia64/ ia64 work.

Change heavyweight interrupt handler to use bank 0 registers instead of AR.KR0 and AR.KR1.
This prevents userspace from the possibility to see what addresses are being used by kernel.

Store kernel stack address in bank 0 r23 instead of AR.KR7. Again, userspace will not be
able to read the address of its kernel stack.

Increase FRAME_SIZE to 64K as this is the first supported page size in which will fit
thread's combined register and memory stack. (RSE can write out as many as 16K.)		  

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