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Rev Age Author Path Log message Diff
1146 6604 d 3 h decky /boot/trunk/arch/ppc32/loader/ add instruction cache flush
align framebuffer on 128K boundary
change OFW calling method
make OFW code more compatible		  
1133 6612 d 22 h decky /boot/trunk/arch/ppc32/loader/ ofw uses \r\n as newline  
1131 6612 d 23 h decky /boot/trunk/arch/ppc32/loader/ kernel boot API change  
1130 6613 d 0 h decky /boot/trunk/arch/ppc32/loader/ extend boot info  
1075 6620 d 6 h decky /boot/trunk/arch/ppc32/loader/ relocate boot loader structures if needed
(allowing to boot on stupid OFW implementations)		  
1071 6620 d 8 h decky /boot/trunk/arch/ppc32/loader/ invalidate segment registers  
1068 6620 d 17 h decky /boot/trunk/arch/ppc32/loader/ proper ppc32 initial memory mapping  
1058 6621 d 0 h decky /boot/trunk/arch/ppc32/loader/ relocate kernel in real mode  
1046 6621 d 5 h decky /boot/trunk/arch/amd64/ add ns  
1045 6621 d 5 h decky /boot/trunk/arch/amd64/grub/ add /ns as the first init task  
1041 6621 d 6 h decky /boot/trunk/arch/ia32/grub/ make /ns the first user-space task, /init the second  
1038 6621 d 7 h decky /boot/trunk/arch/ia32/ add /ns as second init task  
1022 6622 d 0 h decky /boot/trunk/arch/ppc32/loader/ ppc32: boot using real mode trampoline
setup segment registers so far		  
1018 6622 d 3 h decky /boot/trunk/ boot loader for msim  
1009 6622 d 6 h cejka /boot/trunk/arch/amd64/ Uspace included to rebuild image.boot  
1003 6622 d 18 h decky /boot/trunk/arch/ppc32/loader/ simplify register names  
986 6623 d 2 h decky /boot/trunk/arch/ppc32/loader/ ppc32: support for exception vectors  
981 6623 d 3 h decky /boot/trunk/arch/ppc32/loader/ temporal CUDA (VIA 6805) mapping  
971 6623 d 7 h decky /boot/trunk/arch/ppc32/loader/ ppc32: move kernel one frame up  
969 6623 d 8 h decky /boot/trunk/arch/ppc32/loader/ map almost all physical memory
remap framebuffer to a different location		  

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