Subversion Repositories HelenOS

Rev

Go to most recent revision | Show changed files | Directory listing | RSS feed

Filtering Options

Rev Age Author Path Log message Diff
3771 5610 d 2 h rimsky /branches/sparc/kernel/arch/sparc64/ Forgotten files comitted to repository.  
3770 5610 d 2 h rimsky /branches/sparc/ Working on Niagara port - TLB initialization, MMU fault status area initialization, hypercall enhancement, modified tick.c so that the (hyperprivileged) TICK register does not have to be accessed. Now the initialization phase proceeds, but some parts of it are omitted for now (e.g. CPU initialization).  
3743 5617 d 11 h rimsky /branches/sparc/ Started to implement support for sun4v. Bootloader adapted to autodetect the architecture (sun4u, sun4v). Some generic sparc64 kernel files split into sun4u and sun4v versions (but the sun4u is still the default in many cases - in order to keep the code compilable). Implemented taking over the MMU. Implemented routines for performing the hypervisor API calls. Implemented a trivial standard output driver. HelenOS banner can now be printed from the kernel on Niagara.  
3742 5617 d 11 h rimsky /branches/sparc/ The sparc branch synchronized with trunk at revision 3722 (trunk@3722).  
3618 5651 d 1 h rimsky /branches/sparc/ Support for framebuffers, where the first pixel is mapped to a different address than the OBP 'reg' property claims. Cleanup, comments, C-style.  
3607 5652 d 0 h rimsky /branches/sparc/ Cleanup and minor fixes.  
3591 5656 d 9 h rimsky /branches/sparc/ Making the code compatible also with US-IV (US-IV+) - TLB size based on CPU autodetection, cleanup of code waking up APs. General cleanup.  
3493 5687 d 3 h rimsky /branches/sparc/ More changes making the code US-III-conformant (mainly in mm).  
3489 5694 d 5 h rimsky /branches/sparc/ More files made conform the US-III specification. (Changes concern mainly TSB.)  
3467 5712 d 2 h rimsky /branches/sparc/ SMP and CPU initialiation modified to work even with Serengeti OFW tree layout; support for output to the Simics CLI console added (see my blog); some header files modified to conform US-III definition. Now HelenOS (on the sample configuration - usiii.simics) is able to run some userspace tasks.  
3450 5716 d 3 h rimsky /branches/sparc/kernel/arch/sparc64/ Made tlb.h conform US-III specification.  
3440 5717 d 11 h rimsky /branches/sparc/kernel/arch/sparc64/ TLB modifications in order to make functions tlb_print and tlb_invalidate_all work correctly in US-III.  
3343 5746 d 7 h decky /branches/sparc/ add sparc branch  
3233 5769 d 9 h decky /trunk/ remove dummy page coloring facility, which is currenty not used  
3145 5811 d 15 h jermar /trunk/kernel/arch/sparc64/include/ On sparc64, when the operand to the FLUSH instruction doesn't matter, the
instruction's semantics is to flush the pipeline.
 
3133 5813 d 3 h jermar /trunk/kernel/arch/ Add smc_coherence() macro to all architectures.
So far, only amd64, ia32, ia64 and sparc64 are implemented.
 
2725 5941 d 9 h decky /trunk/kernel/ remove config.memory_size, get_memory_size() and memory_init.{c|d}
the amount of available memory can be calculated from the sizes of the zones
add FRAMES2SIZE, SIZE2KB and SIZE2MB functions/macros (code readability)
 
2721 5942 d 10 h decky /trunk/kernel/ convert e820list to a generic physmem command  
2231 6244 d 7 h jermar /trunk/kernel/arch/sparc64/ Fix a nasty bug in the TLB miss handlers on sparc64.
After we no longer lock the kernel stack in the DTLB,
there is a real danger of nested DTLB misses. The nested
miss can very easily clobber the DTLB Tag Access register.
Therefore, the original miss may not read this register, but
it has to receive its value as an argument. The argument
value is saved in the trap table when it is guaranteed that
the nested TLB miss will not occur.
 
2141 6257 d 0 h jermar /trunk/ The Ultimate Solution To Illegal Virtual Aliases.
It is better to avoid them completely than to fight them.
Switch the sparc64 port to 16K pages. The TLBs and TSBs
continue to operate with 8K pages only. Page tables and
other generic parts operate with 16K pages.

Because the MMU doesn't support 16K directly, each 16K
page is emulated by a pair of 8K pages. With 16K pages,
illegal aliases cannot be created in 16K D-cache.
 
2134 6258 d 4 h jermar /trunk/kernel/ Reworked handling of illegal virtual aliases caused by frame reuse.
We moved the incomplete handling from backend's frame method to
backend's page_fault method. The page_fault method is the one that
can create an illegal alias if it writes the userspace frame using
kernel address with a different page color than the page to which is
this frame mapped in userspace. When we detect this, we do D-cache
shootdown on all processors (!!!).

If we add code that accesses userspace memory from kernel address
space, we will have to check for illegal virtual aliases at all such
places.

I tested this on a 4-way simulated E6500 and a real-world Ultra 5,
which has unfortunatelly only one processor.

This solves ticket #26.
 
2106 6309 d 10 h jermar /trunk/kernel/ Merge as_t structure into one and leave the differring parts in as_genarch_t.

Indentation and formatting changes in header files.
 
2105 6313 d 11 h decky /trunk/kernel/ move ipc structures to ipc.h  
2089 6315 d 10 h decky /trunk/ huge type system cleanup
remove cyclical type dependencies across multiple header files
many minor coding style fixes
 
2076 6324 d 11 h jermar /trunk/kernel/ Beat the implicit illegal virtual alias created by reusing userspace frames.
In the anonymous and ELF backends, if the architecture has virtually indexed D-cache,
selectively flush cachelines belonging to the frame being freed.
This fixes Ticket #20.
 
2071 6326 d 3 h jermar /trunk/ (c) versus (C)  
2068 6333 d 11 h jermar /trunk/kernel/ Formatting and indentation fixes.  
2065 6340 d 2 h jermar /trunk/kernel/ Coding style fixes and formatting improvements.  
2054 6354 d 2 h jermar /trunk/kernel/ Fix important comment in kernel/arch/sparc64/src/proc/scheduler.c.

Improve framebuffer code.

Formatting and indentation fixes.
 
2048 6358 d 5 h jermar /trunk/ Formatting and indentation changes.  
2015 6365 d 3 h jermar /trunk/ Rework support for virtually indexed cache.
Instead of repeatedly flushing the data cache, which was a huge overkill, refuse to create an illegal address alias
in the kernel (again) and allocate appropriate page color in userspace instead. Extend the detection also to
SYS_PHYSMEM_MAP syscall.

Add support for tracking physical memory areas mappable by SYS_PHYSMEM_MAP.

Lots of coding style changes.
 
2009 6370 d 3 h jermar /trunk/kernel/ Initial support for handling illegal virtual aliases on sparc64.  
2008 6372 d 4 h jermar /trunk/kernel/arch/sparc64/ Add dcache_flush() function that flushes D-Cache on sparc64.  
2007 6373 d 2 h jermar /trunk/kernel/ Introduce page colors. So far, only sparc64 uses correct page color bits. Other architectures have a dummy define
specifying zero bits for a page color.

There is a new check of page color in as_area_share(). Because of lack of support for this in the userspace, the
check has been #ifef'ed out.
 
1978 6387 d 3 h jermar /trunk/ sparc64 code to support physical memory that starts on non-zero addresses.
Still needs to be tested on systems with such setup.
 
1954 6409 d 2 h jermar /trunk/ Minor changes. Some coding style fixes and also a type (tee vs. tree).
One AS -> as change.
 
1946 6416 d 1 h jermar /trunk/kernel/arch/sparc64/ sparc64 work.
- Improve panic screen on data_access_exception
by dumping contents of DSFSR and DSFAR.
- Change the FHC enable interrupt code to only
set the IMAP_V bit.
 
1891 6447 d 2 h jermar /trunk/kernel/ sparc64 work:
- Experimental support for TSB (Translation Storage Buffer).
 
1890 6447 d 12 h jermar /trunk/ - Create a dedicated slab cache for as_t objects and switch from malloc/free to slab_alloc/slab_free for
them.

- Slightly fix and improve both the kernel and userspace atomic_add() on sparc64.

- More TSB work on the sparc64 front.
 
1889 6448 d 4 h jermar /trunk/kernel/ Fix bug in mm/as.c:
- as_area_destroy() should not work with AS but as

sparc64 work:
- start implementing TSB support