| Rev |
Age |
Author |
Path |
Log message |
Diff |
| 4679 |
5384 d 6 h |
rimsky |
/branches/sparc/kernel/ |
Enhancing the way how even distribution of threads over processor cores is achieved. |
|
| 4663 |
5392 d 9 h |
rimsky |
/branches/sparc/kernel/ |
Implemented detection of execution units, used in a heuristics which prevents the ready threads be unevenly distributed among physical cores by changing the order in which APs are woken up (and hence the order in which the CPUs will be running their kcpulb thread). Cleanup. |
|
| 4638 |
5404 d 7 h |
rimsky |
/branches/sparc/kernel/ |
SMP on Niagara made working: debugged the problem with the 'non-deterministic' symptoms, implemented the IPI mechanism. |
|
| 4614 |
5411 d 3 h |
rimsky |
/branches/sparc/kernel/arch/sparc64/ |
Waking CPUs up on sun4v. Weird errors occur when accessing the THE structure. |
|
| 4433 |
5451 d 4 h |
rimsky |
/branches/sparc/kernel/arch/sparc64/ |
Fixed a TSB problem. |
|
| 4383 |
5464 d 8 h |
rimsky |
/branches/sparc/kernel/arch/sparc64/ |
Fixed instruction access exception and data access exception in the trap table. Added new traps defined by UltraSPARC Architecture 2007 (which UltraSPARC T2 follows). |
|
| 4369 |
5468 d 3 h |
rimsky |
/branches/sparc/kernel/arch/sparc64/ |
Kernel stack and userspace window buffer pointers are stored in scratchpad registers instead of memory. |
|
| 4130 |
5524 d 2 h |
rimsky |
/branches/sparc/ |
Cleanup of the Niagara port. The main purpose of these changes is to make it easy to find out which code is generic, which is sun4u-specific and which is sun4v-specific. |
|
| 4129 |
5524 d 22 h |
rimsky |
/branches/sparc/kernel/arch/sparc64/ |
Implemented missing features in Niagara memory management, minor cleanup. |
|
| 4073 |
5527 d 2 h |
rimsky |
/branches/sparc/ |
Implemented input and output drivers for Niagara. Written in the old-fashion style (do not use the new DDI infrastructure nor the new keyboard driver). Anyway, tetris can be played. |
|
| 3993 |
5536 d 23 h |
rimsky |
/branches/sparc/kernel/ |
Implemented preemptible trap handler for userspace (including syscalls - did not forget enabling interrupts for them) and the ralated stuff. Implemented handlers of instruction/data MMU miss/protection. Now some userspace tasks are run; there are, however, still some bugs causing unexpected data MMU misses. |
|
| 3863 |
5558 d 23 h |
rimsky |
/branches/sparc/ |
Simics machine: modifications needed to run userspace (the next step will be to implement the trap handler for uspace); real machine: small fixes, after them the machine passes some parts of the initialization, but fails to determine CPU frequency (probably due to a different format of Machine Description). |
|
| 3862 |
5562 d 0 h |
rimsky |
/branches/sparc/kernel/ |
Changed the structure of header files, which have sun4u and sun4v versions. Implemented some sun4v TSB functions. |
|
| 3835 |
5567 d 0 h |
rimsky |
/branches/sparc/kernel/arch/sparc64/ |
Niagara: Implemented (and debugged) installing identity mapping for kernel. Now all the kernel tests pass on Simics. |
|
| 3817 |
5574 d 23 h |
rimsky |
/branches/sparc/kernel/ |
Progress on Niagara: Commented out portions of mm, which are not required for kernel threads (temporarily). Scheduler is working. Implemented a driver of hypervisor's standard input. Kernel console is usable. |
|
| 3798 |
5580 d 0 h |
rimsky |
/branches/sparc/kernel/ |
Implemented preemptible trap handler for sun4v for trapping from kernel (not userspace). Not properly tested/debugged yet. HelenOS now reaches the as_install_arch function (where it, of course, fails). |
|
| 3783 |
5592 d 1 h |
rimsky |
/branches/sparc/kernel/arch/sparc64/ |
Machine description traversal implemented. Now used to detect CPU frequency. |
|
| 3771 |
5595 d 1 h |
rimsky |
/branches/sparc/kernel/arch/sparc64/ |
Forgotten files comitted to repository. |
|
| 3770 |
5595 d 1 h |
rimsky |
/branches/sparc/ |
Working on Niagara port - TLB initialization, MMU fault status area initialization, hypercall enhancement, modified tick.c so that the (hyperprivileged) TICK register does not have to be accessed. Now the initialization phase proceeds, but some parts of it are omitted for now (e.g. CPU initialization). |
|
| 3748 |
5602 d 2 h |
rimsky |
/branches/sparc/kernel/arch/sparc64/ |
Be careful to preserve the output registers when processing the fast data access MMU miss. |
|